Featured Work Archives - RISC-V International
Close Search
Category
Featured Work
See what others are building on RISC-V. Featured Work showcases projects, research, ideas, and the people bringing them to life.
Mar
24
Using a Performance Model to Implement a Superscalar CVA6
By
RISC-V International Staff
Featured Work
Project Snapshot How does performance modeling accelerate real hardware innovation in open RISC-V designs? In this paper, Thales demonstrates a performance model of the CVA6 RISC-V processor, built to evaluate…
Feb
17
Support RAJA and Scientific Applications on RVV Architectures
By
RISC-V International Staff
Featured Work
Project Snapshot In this work, we aim to make RVV more accessible to scientific applications by integrating it into the RAJA performance-portability framework. RAJA is a C++ library primarily developed…
Jan
27
How We’re Using AI to Streamline RISC-V Regression Debugging
By
RISC-V International Staff
Featured Work
AI verification startup Verifaix explains how its AI Debug Agent automates regression debugging, helping RISC-V developers reduce manual verification effort and accelerate design cycles.
Dec
10
Ocelot3: Full Vector “V” Extension for BOOM
By
RISC-V International Staff
Featured Work
Project Snapshot Ocelot is an open-source project that enables vector support for the BOOM core. In this generation, we achieve full RVV 1.0 support. The decoupled VPU is connected through…
Nov
25
Enabling High Performance RISC-V Software for AI in the Real World
By
RISC-V International Staff
Featured Work
Embecosm used the oneAPI Construction Kit to explore accelerating PyTorch using RISC-V cores, trying over a thousand in emulation and some on an FPGA. This case study shows how the…
Oct
16
Optimizing Hardware for Neural Network Inference using Virtual Prototypes
By
RISC-V International Staff
Featured Work
Project Snapshot Identifying the optimal hardware configuration for running NN inference on edge devices is critical for maximizing performance. Tailoring HW designs to specific applications significantly increases resource utilization. We…
Sep
30
A RISC-V Based Accelerator for Post Quantum Cryptography
By
RISC-V International Staff
Featured Work
Project Snapshot Post-Quantum Cryptography (PQC) is a topic of increased interest in the past decade, both with regards to the cryptosystem definition and the hardware and software implementations to perform…
Aug
26
CVA6 RISC-V PMP Vulnerabilities against FIA
By
RISC-V International Staff
Featured Work
Project Snapshot Fault Injection Attacks (FIA) present considerable threats to the security and reliability of embedded systems. FIAs can compromise an embedded processor by altering its clock signal, power supply…
Jul
29
Learning Computer Architecture with a Visual Simulation of RISC-V Processors
By
RISC-V International Staff
Featured Work
Project Snapshot This work presents an interactive way of teaching computer architecture using Logisim Evolution, enabling students to construct and debug single-cycle and pipelined CPUs. Enhancements to Logisim Evolution allow…
Jun
24
TYRCA: A RISC-V Tightly-Coupled Accelerator For Code-Based Cryptography
By
RISC-V International Staff
Featured Work
Project Snapshot Post-quantum cryptography (PQC) has garnered significant attention across various communities, particularly with the National Institute of Standards and Technology (NIST) advancing to the fourth round of PQC standardization.…
Subscribe for updates, event info, webinars, and the latest community news
About
Technical Steering Committee
Board of Directors
FAQ
About RISC-V
History of RISC-V
Blog
News
Announcements
Genealogy
Policies
Code of Conduct
Antitrust Policy
Brand Guidelines
Specification
Ratified
Under Development
Contribute
Developers
Get Started
Training
Development Partners
Developer Boards
Labs
Mentorship
Technical Wiki
Industries
Automotive
Artificial Intelligence
Case Studies
Exchange
Landscape
Software Ecosystem Dashboard
Events
RISC-V Summit
Calendar
Videos
Community Meetings
Members
Current Members
Resources
Recognition
Resources
Get RISC-V Gear
Join RISC-V International
Becoming a member of RISC-V International allows companies and individuals to actively influence the development of an open, royalty-free instruction set architecture, driving innovation in custom processor designs.
JOIN NOW
Copyright © RISC-V International®. All rights reserved. RISC-V, RISC-V International, and the RISC-V logos are trademarks of RISC-V International.
For trademark usage guidelines, please see our
Brand Guidelines
and
Code of Conduct Policy
Antitrust Policy
Close Menu
Blog
Blog Home
News and Updates
Viewpoints
Featured Work
Submit Content
About
Annual Report 2025
About RISC-V International
Staff
Board of Directors
Technical Steering Committee
FAQ
Specifications
Ratified
Specs Under Development
Contribute
Developers
Get Started
Development Partners
Developer Boards
Ecosystem Labs
Technical Meeting Calendar
Technical Resources
Ambassadors & Advocates
Technical Committees & Groups
Industries
Applications
Applications
Automotive
Data Center
High Performance Computing (HPC)
IoT/Embedded
Industrial & Robotics
Space and Aerospace
Technologies
Technologies
Artificial Intelligence
Security
Solutions
Solutions
Case Studies
Exchange
Landscape
Software Ecosystem Dashboard
Community
Events
Events
RISC-V Summits
World RISC-V Days
Calendar
Community Events
Videos
Participate
Participate
Become a RISC-V Insider
Meeting Calendar
Alliances
Marketing Committees & Groups
Forums
Job Board
Learn
Learn
Training
Training Partners
Mentorship
Teach a Course
Membership
Current Members
Join
Resources
Recognition
x-twitter
github
flickr
slack
email