Investigations of Deep Level Defects in

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Investigations of Deep Level Defects in Semiconductor Material Systems
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Prabhakar, Arati
(1985)
Investigations of Deep Level Defects in Semiconductor Material Systems.
Dissertation (Ph.D.), California Institute of Technology.
doi:10.7907/BNQT-B222.
Abstract
In this thesis, we present the results of two groups of investigations of deep level defects in semiconductor material systems.
Chapter 1 consists of an overview of the thesis, background information on semiconductor impurities, and a description of deep level transient spectroscopy (DLTS).
Chapter 2 contains discussions of the experiments performed on transition metal silicide-silicon Schottky barrier structures to probe for the existence of deep levels. We investigated platinum, palladium, and nickel silicides on n-type silicon which were annealed at temperatures from 300 to 800°C. The primary techniques used were DLTS, current-voltage (IV), and capacitance-voltage (C-V) measurements for electronic characterizations, and Rutherford backscattering spectrometry (RBS) to determine the silicide phase and film condition. For our samples, 700°C was the maximum temperature below which no significant degradation of the barrier or contamination of the underlying silicon were observed in platinum and palladium silicide structures. Nickel silicide structures could only withstand temperatures up to 500°C. Cobalt, chromium, and erbium silicides were also studied using DLTS. These measurements constitute the first series of studies of deep level contamination of the silicon underlying a transition metal suicide thin film.
Chapter 3 details our DLTS studies of four different compositions of the alloy In
1-x
Ga
As
1-y
. Our samples, with bandgaps of 0.75, 0.83, 0.95,and 1.1 eV, covered the range of compositions that are lattice-matched to InP and are used for long-wavelength optoelectronic devices. No traps were observed above the detection limit of 5 x 10
13
cm
-3
. The only exception was one sample, which had a trap that was attributed to a lattice defect in the substrate. These DLTS experiments were the first attempt to investigate deep level defects in In
1-x
Ga
As
1-y
Item Type:
Thesis (Dissertation (Ph.D.))
Subject Keywords:
Applied Physics
Degree Grantor:
California Institute of Technology
Division:
Engineering and Applied Science
Major Option:
Applied Physics
Thesis Availability:
Public (worldwide access)
Research Advisor(s):
McGill, Thomas C.
Thesis Committee:
Nicolet, Marc-Aurele (chair)
Mead, Carver
Bridges, William B.
Janda, Kenneth C.
McGill, Thomas C.
Defense Date:
21 August 1984
Funders:
Funding Agency
Grant Number
Bell Laboratories Graduate Research Program for Women
UNSPECIFIED
Caltech
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CaltechETD:etd-06212004-160535
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INVESTIGATIONS OF DEEP LEVEL DEFECTS
IN SEMICONDUCTOR MATERIAL SYSTEMS

Thesis by
Arati Prabhakar

In Partial Fulfillment of the Requirements
for the Degree of
Doctor of Philosophy

California Institute of Technology
Pasadena, California

1985

(Submitted August 21, 1984)

To Raj, my mother

ACKNOWLEDGEMENTS

It is a pleasure to thank Dr. Tom McGill for his part in this work. I
could not have asked for a better adviser during the last few years. He
deserves many thanks for providing an outstanding research environment,
for letting me discover my strengths at Caltech, and for showing me that
this degree can open an incredible variety of doors. I have enjoyed working
with him throughout my time here, and J will remember with pleasure our
conversations on topics that ran the gamut from the latest in technology to
the latest in politics. |

I am glad to acknowledge the contributions of Dr. M-A. Nicolet in the
silicide work which comprises the bulk of this thesis. Interacting with him
and his group helped to broaden my base in the area of semiconductors. His
enthusiasm and guidance in this project have been greatly appreciated.

Vere Snell has provided expert assistance in the operations of the group.
From her first smile of welcome, she has made day-to-day life a lot easier for
the last five years. Her contribution will not be forgotten.

Our research group has evolved significantly since I joined it, but it has
always provided education and growth. I will remember each member of the
group here for the many things J have learned from them.

So many people showed me new worlds; they kept me going and provided
support through the difficult times. Chief among these are Helen, Paul,
Stephenie, Liz, John, Gary, Vijaya, and Tim, and my mother, Raj, and

brother, Aloke. The gifts they have given me can never be repaid. Many

iv
thanks.

I am happy to credit the Bell Laboratories Graduate Research Program
for Women (GRPW) for the fellowship which gave me the opportunity to
spend two excellent summers at Bell Labs. The most outstanding feature
of the program has been the counsel and friendship of Drs. Marty Pollack
and Bob Nahory. They both deserve thanks for their support and excellent
“mentoring.” |

For financial support, I am pleased to acknowledge the Bell Labs GRP W

program and the California Institute of Technology.

ABSTRACT

in this thesis, we present the results of two groups of investigations of
_ deep level defects in semiconductor material systems.

| Chapter 1 consists of an overview of the thesis, background informa-
tion on semiconductor impurities, and a description of deep level transient
spectroscopy (DLTS).

Chapter 2 contains discussions of the experiments performed on transi-
tion metal silicide-silicon Schottky barrier structures to probe for the ex-
istence of deep levels. We investigated platinum, palladium, and nickel
silicides on n-type silicon which were annealed at temperatures from 300
to 800 °C. The primary techniques used were DLTS, current-voltage (I-
V), and capacitance-voltage (C-V) measurements for electronic character-
izations, and Rutherford backscattering spectrometry (RBS) to determine
the silicide phase and film condition. For our samples, 700 °C was the max-
imum temperature below which no significant degradation of the barrier or
contamination of the underlying silicon were observed in platinum and pal-
ladium silicide structures. Nickel silicide structures could only withstand
temperatures up to 500 °C. Cobalt, chromium, and erbium silicides were
also studied using DLTS. These measurements constitute the first series of
studies of deep level contamination of the silicon underlying a transition
metal silicide thin film.

Chapter 3 details our DLTS studies of four different compositions of the

alloy Inj-,GazAs,Pj-,. Our samples, with bandgaps of 0.75, 0.83, 0.95,

and 1.1 eV, covered the range of compositions that are lattice-matched to
InP and are used for long-wavelength optoelectronic devices. No traps were
observed above the detection limit of 5 x 104° cem-5. The only exception
was one sample, which had a trap that was attributed to a lattice defect in
the substrate. These DLTS experiments were the first attempt to investigate

deep level defects in Inj_,Ga,AsyP)~y.

vii
Parts of this thesis have been or will be published under the following

titles:

Platinum diffusion into silicon from PtSi, A. Prabhakar, T. C. McGill, and.
_ MCA. Nicolet, Appl. Phys. Lett. 43, 1118 (1983).

Thermally Induced Transition Metal Contamination of Silicide Schottky Bar-
riers on Silicon, A. Prabhakar and T. C. McGill, Proceedings of the 1984

Physics of VLSI Conference (submitted for publication).

In addition, parts of this work have been presented under the following

titles:

Thermally Induced Transition Metal Contamination of Silicide Schottky Bar-

riers on Silicon — Physics of VLSI Conference, August, 1984.

‘Deep Level Transient Spectroscopy (DLTS): An Overview with Examples
— University of California at San Diego Electrical Engineering Department

Seminar, May, 1984.

Deep Levels in Silicon from Transition Metal Silicides — Materials Research

Society Meeting, November, 1983.

Suicide Silicon Structures Probed by DLTS — Electronics Materials Confer-

ence, June, 1983.

CONTENTS

ACKNOWLEDGEMENTS
ABSTRACT

CHAPTER 1: The Application of Deep Level Transient Spec-
troscopy to the Study of Defects in Semiconduc-
tors

1.1 Overview of the Thesis

1.2 Defects in Semiconductors
1.2.1 Shallow Impurities
1.2.2 Deep Level Defects
1.2.3 Characteristics of Shallow and Deep Levels
1.2.4 Effects on Devices

1.3 Deep Level Transient Spectroscopy (DLTS)
1.3.1 Depletion Width as Charge Transducer

1.3.2 Capacitance Transients
13.3 DLTS Rate Window

1.3.4 Obtaining Trap Information from DLTS

Spectra
1.3.5 Experimental Setup
1.3.6 Guidelines for the Application of DLTS

1.4 Summary of Results of Thesis
References

CHAPTER 2: Characterizations of the Degradation of Transi-
tion Metal Silicide-Silicon Structures

2.1 Introduction
2.1.1 Applications of Transition Metal Silicides
2.1.2 Goal of Our Investigations

CO oe

il
12

16
16

2T
29
32

39
39
41

2.2 Measurements Used to Study Silicide-Silicon Structures
2.2.1 Rutherford Backscattering Spectrometry (RBS)

2.3 Sample Preparation

2.4 Results for Platinum Silicides
2.4.1 RBS Measurements
2.4.2 Secondary Ion Mass Spectrometry Results
2.4.3 I-V and C-V Measurements
2.4.4 DLTS Measurements
2.4.5 Summary of Platinum Silicide Results

2.5 Results for Palladium and Nickel Silicides
2.5.1 RBS Measurements
2.5.2 I-V and C-V Measurements
2.5.3 DLTS Measurements

2.5.4 Summary of Palladium and Nickel Silicide
Results

2.6 Results for Other Silicides
2.6.1 Cobalt Silicides
2.6.2 Chromium Silicides
2.6.3 Erbium Silicides

2.7 Summary of Silicide Results
References
CHAPTER 3: DLTS Studies of Inj_.GazAs,Pi_y

3.1 Introduction
3.1.1 The Inj_,Ga,As,P,_, Material System

3.1.2 Inj_,Ga,AsyP,;_, Lasers and Motivation for
Studies

3.2 Samples

52
52
58
65
71
76

78
78
81
81

89
89
95
95

101

102
102

106

110

3.3 Results and Conclusions
References
APPENDIX: Experimental Details of the DLTS System

‘References

114

116

117

122

CHAPTER 1

THE APPLICATION OF
DEEP LEVEL TRANSIENT SPECTROSCOPY
TO THE STUDY OF DEFECTS IN SEMICONDUCTORS

1.1 Overview of the Thesis

Because deep level defects can alter the electronic properties of a semi-
conductor significantly, a knowledge of their existence in materials for devices
‘ ¢an be very important. In this thesis, the existence of deep traps is investi-
gated in two different semiconductor systems.

Chapter 2 of this thesis details the first group of experiments. These
experiments are examinations of structures consisting of a thin film transi-
tion metal silicide (TMS) on a silicon substrate. Transition metal silicides
are used in integrated circuits and may also find future application in multi-
layer silicon molecular-beam-epitaxy (MBE) structures. They are typically
formed by annealing a substrate with a pure metal overlayer. Any indiffused
metal atoms could degrade and ruin devices. The purpose of our studies of a
variety of TMS’s was to determine the annealing temperatures at which this
indiffusion becomes significant. The bulk of the analysis dealt with platinum,
palladium, and nickel silicides on silicon which had been treated at tempera-
tures from 300 to 800 °C for times from 30 to 180 min. We also investigated
cobalt, chromium, and erbium silicides. Electronic characterizations were
made using deep level transient spectroscopy (DLTS), current-voltage, and
capacitance-voltage measurements. Rutherford backscattering spectrometry
was also used to characterize the silicide layer. These measurements com-
prise the first investigations of the deep-level contamination of silicide-silicon
structures.

Chapter 3 is a discussion of the second system in which we searched

for traps: the quaternary alloy In;.,Ga,As,P;_,. Various compositions
of this material are used to make long-wavelength lasers and detectors for
fiber optic communications systems. Early attempts to fabricate high-quality
lasers in the 1.3-1.5. wm range failed because threshold currents were too
high and quantum efficiencies too low. In alloys across the range of com-
positions lattice-matched to InP, we used DLTS to investigate the existence
of traps that could have been responsible for these difficulties. This set
of DLTS measurements was the first attempt to search for deep levels in
Inj~1Ga;,AsyP}_,.

The remainder of this introductory chapter is as follows: Section 1.2
contains background information on defects in semiconductors. Section 1.3
is a description of the main features of DLTS, the primary technique used in

this work. Section 1.4 is a summary of the results of this thesis.

1.2 Defects in Semiconductors

Of the many types of materials that are technologically important today,
semiconductor crystals require the greatest level of impurity control. While
a metal is considered extremely pure with contaminant concentrations as
high as one part in ten thousand, or ~ 1018 atoms cm7°, semiconductor
devices can require crystal materials with less than 10° electrically active
impurities cm~*. The control of the type and amount of impurity in the
various parts of a semiconductor material is key in the construction of any
device. Electronic impurities in semiconductor crystals are generally grouped
in two large catagories: shallow impurities and deep level defects. Figure 1.1
shows the location of several shallow and deep levels in the bandgaps of silicon
and gallium arsenide, the two most common semiconductor materials. Each

level is labeled according to the element with which it is correlated. The

technologically important defect in GaAs known as EL2! is also shown.

1.2.1 Shallow Impurities

Physically, a shallow impurity consists of an atom which has one more
valence electron (donor or n-type impurity) or one less valence electron (ac-
ceptor or p-type impurity) than the atom of the host semiconductor that
would ordinarily occupy the lattice site. The result of this difference in va-
lence for the case of the donor impurity is the introduction of an extra elec-
tron in addition to those used for tetrahedral bonding. If an acceptor atom is

present, one of the four valence electrons for bonding is missing. Thus, in sili-

Figure 1.1: Impurity levels in silicon and gallium arsenide. (Primarily from
Ref. 2.) CB and VB denote conduction band edge and valence band edge,

respectively.

SILICON

—— CB
Al P As Pt Pd Ni Co Fe Au VB
GALLIUM ARSENIDE
—_— CB
Te Si Zn Cd Au Ni Fe Cr Fig“?

con, a column [V material, elements from column II (e.g., boron, aluminum)
form shallow acceptors, while column V elements (phosphorus, arsenic) act.
as shallow donors. In a compound semiconductor such as gallium arsenide,
shallow impurities include zinc on a gallium site (acceptor) and sulfur on an
. arsenic site (donor). Since silicon has a valence between that of gallium and
that of arsenic, the type of impurity depends on the lattice site on which the
impurity atom lies: silicon on an arsenic site is an acceptor, while silicon on
a gallium site is a donor. |

An extra electron or a missing electron (hole) is coulombically bound
to the impurity atom in a fashion similar to the binding of an electron to a
proton in a hydrogen atom, with the primary difference that the impurity
electron or hole is in a solid material which affects its motion. A modified
hydrogen model can predict the energy levels £, and the orbital Bohr radii

@, for these shallow impurities quite well:

a mon oH (1.1)
Moen?

an = m* an, . (1.2)

where m” is the electron or hole effective mass, mo is the electron rest mass, €
is the relative dielectric constant of the semiconductor material, n designates
the state, Ey is the hydrogen ground state energy (13.6 eV), and aq is the
hydrogen ground state Bohr radius (0.53 A). The charge carriers have diffuse
wavefunctions covering several tens of angstroms. Since the model is more
accurate when the orbit size is large compared to the lattice spacing (~ 5A),

the energy level predictions are fairly reasonable for the carrier ground state

and very good for the excited states. The levels lie in the forbidden energy
gap of the semiconductor. Donor states lie close to the conduction band edge
and are composed of &states from the conduction band minimum; acceptor
states are close to the valence band edge and are composed of states from
the valence band maximum. Because the wavefunctions are so diffuse in the
crystal, these impurity levels are localized in &space. The top portion of Fig.
1.2 shows a representation of a shallow impurity atom in a semiconductor
lattice and the corresponding energy level in the bandgap. The level drawn

is for a donor impurity.

1.2.2 Deep Level Defects

The other catagory of electronic semiconductor impurities, deep level
defects, includes everything else. The physical configurations include substi-
tutional defects, as in the case of shallow impurities, and interstitial defects.
Self-interstitials, lattice vacancies, and defect complexes are also possible.
These impurities and impurity complexes can have electronic energy levels
which lie throughout the energy gap. Further, one impurity element can
introduce more than one defect level in the bandgap.

Theoretical models for this group of defects are clearly less accessible
than in the case of shallow impurities. Even in the simplest case of a single
substitutional deep impurity, the hydrogenic model is not. useful because the
wavefunctions are too highly localized. Analysis is even more complicated
for interstitial defects and defect complexes. However, several general trends

are evident. The defect can bind carriers more strongly than a shallow level,

Figure 1.2: Descriptive diagrams showing shallow and deep defects in a
crsytal lattice and their related energy levels in the bandgap of the semi-
conductor. The defects are filled circles in the real space drawings; carrier
orbitals are indicated by light lines. CB and VB denote conduction band

edge and valence band edge, respectively.

SHALLOW
DEFECT

DEEP
DEFECT

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BANDGAP

—VB

—-VB

so the energy level of the defect may be located closer to midgap. Since the
orbital of an electron or hole bound to a deep level defect is smaller than
that of a less tightly bound carrier orbiting a shallow impurity, the extent of
. the level in k-space is correspondingly greater. Thus, a single extremum is
not sufficient for a theoretical description of a deep level defect. The bottom

portion of Fig. 1.2 shows a schematic representation of these features.
1.2.3 Characteristics of Shallow and Deep Levels

The two types of impurities have several general characteristics which
distinguish them and determine their different roles in semiconductor devices.
Since shallow impurities reside on substitutional sites and form several bonds
to neighboring atoms, they do not diffuse very easily — diffusion coefficients

at 1200 °C are in the range of 10~'! — 10-!” cm? s~!. Correspondingly,

079 38

their solid solubilities can be as high as 1 cm7’, or a few at. %. Deep
level impurities, on the other hand, can have diffusion coefficients at 1200 °C
as much as six orders of magnitude higher than shallow species, with solid
solubilities between 10'5 and 1018 cm’. Even deep impurities which reside
in substitutional sites may move through the lattice via interstitial sites;
thus, these higher diffusivities (and related lower solubilities) are the result
of transport of impurities from one interstitial site to another.

Essentially all the shallow impurities in a semiconductor are ionized at
the typical device temperatures (around room temperature), so their contri-

bution to the free carrier concentration in the semiconductor can be approx-

imated to be the same as the concentration of impurity atoms. If there are

both donors and acceptors in the material, the number of free carriers can be
approximated to be Na ~— Ng|, where N, is the number of acceptors and Ny
is the number of donors. The material will be p-type or n-type depending on
_ which type of impurity is more numerous. The effect of a deep defect on the
free carrier concentration depends not only on the defect concentration, but
also on the activation energy (or position in the bandgap) of the deep level,
its electron and hole capture cross sections, the shallow dopant type and
concentration, and the temperature. Various deep levels may act as charge
traps, recombination centers, or generation centers. These processes are il-
lustrated in Fig. 1.3. For example, after a defect level captures an electron
from the conduction band, two events are possible. The electron may be
re-excited to the conduction band or it may drop to the valence band. The
second process is equivalent to the level trapping a hole which annihilates
the trapped electron. If re-excitation to the conduction band is more proba-
ble, the level is termed a trap; however, if the probability of dropping to the
valence band is greater, it is called a recombination center. Conversely, if a
defect is in a region with no free carriers, an electron may be excited from
the valence band to the defect level and then to the conduction band. This
process may be viewed as the emission of a hole and an electron from the

defect level. In this case, the defect is referred to as a generation center.

1.2.4 Effects on Devices

Shallow level impurities are used almost exclusively to provide the nec-

essary carriers, u- or p-type, in semiconductor devices. However, several

Figure 1.3: A deep level defect acting as a charge trap, a recombination cen-
ter, and a generation center. D designates the defect level. Hole transitions

are denoted by circles, electron transitions by minus signs.

charge trap

recombination
center

generation
center

oe)

special cases exist in which deep level defects are also necessary for the op-
eration of a device. For example, in fast switching junctions, deep level
traps are used to kill free carrier lifetimes by pulling carriers out of the con-
. duction or valence band. Deep levels are also used in gallium phosphide
light-emitting diodes. Since GaP is an indirect semiconductor, transitions
from the bottom of the conduction band to the top of the valence band are
only possible with the addition of phonons, and therefore not as likely as
a uo-phonon process. Deep levels in the bandgap have large, overlapping
extents in kspace, so level-to-level transitions are more probable. The light
~ emitted by a GaP LED consists of photons emitted by this transition. A
third example is the application of EL2, and to a lesser extent chromium,
in making semi-insulating gallium arsenide for integrated circuit substrates.
In this case, the deep defects pin the Fermi level near midgap. Nevertheless,
deep level defects are undesirable in the vast majority of cases, since traps

‘pose serious problems by eliminating free electrons and holes.

1.3 Deep Level Transient Spectroscopy

The primary tool used in the investigations discussed in this thesis was
_ deep level transient spectroscopy (DLTS). This technique, which was devel-

5:4 can be used to obtain information about

oped about twelve years ago,
traps in a depleted region of a semiconductor via the observation of carrier
emission. This section contains general background and a description of the

main features of DLTS; the Appendix has additiona] experimental details.
1.3.1 Depletion Width as Charge Transducer

DLTS measurements hinge on the use of the depletion width as a mea-
sure of the trapped charges in the region. Since almost all of the work in this
thesis was performed on asymmetric ptn junctions or Schottky barriers on
n-type material, we will consider the n-type case here; analogous results are
‘easily obtained for n+p junctions or Schottky barriers on p-type material.

An asymmetric p*n junction and the space charge in its depletion region

are shown in Fig. 1.4. The depletion width W under a reverse bias V is

_ [2€(Vp; +V) |
W = — (13)

where ¢€ is the dielectric constant of the material, V,; is the built-in voltage
(or barrier height in the Schottky case), e is the electronic charge, and Ni
is the shallow donor concentration in the n-type region. The corresponding

junction capacitance C is given by

— (14)

Figure 1.4: Space charge in the depletion region of an abrupt ptn junction.
The region extends much further on the n-type side since the density of
donors there is so much less than the density of acceptors on the pt side.

The distance from the junction is z.

spacea
charge

19
A being the diode area. If we add at z (0 < « < W) a small density n(z)
of fixed negative charges in a region of width Az, the depletion region will
expand slightly, thereby uncovering more ionized donors — fixed positive
charges — to compensate for the negative charges and maintain charge neu-
trality. The junction capacitance will drop by an amount AC. It can be
shown that this change is given by

AC _ __a(z)

G = "NW? Az. (1.5)

Thus, the capacitance change is proportional to the number of charges. Since
it is also proportional to z, the change is smaller for charges introduced closer
to the junction.

If we now assume that these fixed charges are actually carriers trapped
by a defect level in the depletion region, we can relate the capacitance change
to the number of traps (assuming all the traps in the region are filled).

Integrating the expression for AC from z = 0 to z = W yields

AC N

Here, N is the number of negative charge traps. We have assumed that the
concentration of traps is uniform across the depletion region. This result
means that if all the traps in the depletion region are filled, the relative
change in the capacitance is proportional to the trap density in the depletion
region. Thus, the depletion width, monitored via the junction capacitance,

can be used to get information about charge traps.

1.3.2 Capacitance Transients

- At a temperature T, the thermally activated release of carriers by a
trap will occur at a rate proportional to exp(—E,/kaT), where E, is the
activation energy of the trap, and kg is Boltzmann’s constant. Thus, if we
fill a trap in the depletion region and allow it to empty, the depletion width
and junction capacitance will relax approximately exponentially back to their
respective quiescent values. The most common technique for filling the traps
is reducing the reverse bias for a time long enough for the traps to capture
carriers. The process is illustrated in Fig. 1.5. First, we apply a reverse bias
to the junction and wait until steady state has been reached. At this time, all
traps in the depletion region are empty. We now apply a reduced bias pulse
to the junction. Electron traps in the portion of the original depleted region
which is now normal capture electrons from the conduction band. After the

“pulse, the bias is the same as that at the beginning of the process. However,
the depletion width is slightly larger to compensate for all the electrons fixed
to the traps in the region. As these electrons are thermally released, they are
swept out of the region very quickly, so they are not available for re-trapping.
The depletion width returns to its quiescent value as the traps are emptied.
The junction capacitance is inversely proportional to the width; it therefore

decreases after the pulse and rises back to the quiescent level.

This discussion applies for the case of trapped electrons. If we instead fill
hole traps in the depletion region by some technique, the depletion width will

decrease to compensate for the positive charges. The capacitance transient

Figure 1.5: A capacitance transient from a deep level in an n-type depletion
region. T designates the trap level. During the pulse, both the width W and

the capacitance C are off scale.

Setertgsece CB
~ 1

———T quiescent
reverse bias

sep ;
OS 7 capture during
ulse
VB P |
ge iececees
————VB

will then be positive. Thus, the sign of the transient is negative for an
electron trap and positive for a hole trap. In general, the sign of the transient.
is negative for a majority carrier trap aud posttive for a minority carrier trap,
_ regardless of whether the material is n~ or p-type.

| Free minority carriers may be introduced by forward biasing the junction
if the sample used is a p-n diode. However, if a Schottky barrier is used,
forward biasing will not provide these carriers. In this case the sample is
often illuminated with photons of energy greater than the semiconductor
bandgap to create free electrons and holes.

If we apply a train of pulses to the junction, a series of capacitance
transients will result. By varying the sample temperature, we can then
produce a number of transients which have different decay time constants —
from essentially infinite at very low temperature to essentially zero at very
high temperature. A DLTS spectrum is produced by analyzing such a train

of transieuts.
1.3.3 DLTS Rate Window

The most common technique used for the analysis of these transients is
the rate window. As the temperature is scanned, the rate window generates
an output — the DLTS signal 5 — which peaks when the input transient
rate matches the selected rate. A straightforward implementation of this
method involves sampling each transient at times ¢; and 2 and subtracting
the sampled values. Figure 1.6 shows how this sampling technique produces

a peak from a group of transients with different rates. At low temperature,

Figure 1.6: Capacitance transients sampled at ¢; and tf, to produce a peak.

(From Ref. 3.)

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TIME

the trapsient decays very slowly, so its magnitude is essentially the same at ¢,
and at é,. At high temperature, the decay occurs so quickly that the signal is.
at its quiescent value before ¢,, and again, the difference in magnitude of the
signal at the two times is approximately zero. The difference in magnitude
at th and é, will go through a maximum at an intermediate temperature,
when the signal is still large at ¢; but close to its quiescent value at te. The
transient time coustaut r that corresponds to the peak is determined by ¢,
and fg:
t, — ty

r= n(t,/t2) {1.7)

Thus, we can select varions rates by selecting different values of t; and ép.

The DLTS signal is then

Note that S has the same sign as the transients themselves, since C(ts) >
C (tz) for a positive transient and C(t,) < C(t2) fora negative transient. The
sign of the DLTS signal is therefore determined by the type of trap observed:
a majority carrier trap produces a negative signal, while a minority carrier
trap produces a positive signal.

The discussion so far has assumed that we have only one deep level in
the sample. However, the previous analyses also hold for the case of several
traps in the sample, provided that they have sufficiently different activation
energies. The capacitance transient is then a superposition of transients
for the individual traps. The double-sampling scheme for analysis generates

peaks at different temperatures, one for each deep level.

Thus, a DLTS spectrum is produced by a) applying a train of trap-filling
pulses to the reverse-biased junction, 6) scanning temperature, c) measuring
the junction capacitance transients, d) analyzing the transients with a rate
_ window, and e) plotting the rate window output (the DLTS signal S) as a

function of the sample temperature.
1.3.4 Obtaining Trap Information from DLTS Spectra

A good deal of information about the deep level can be extracted from
DLTS spectra. Here, we describe the most common measurements made.

In Sec. 1.3.1, we showed that the change in capacitance AC is propor-
tional to N, the number of traps, if all the traps in the depletion region are
filled. By relating the DLTS peak height to AC, we can obtain a simple
formula to compute the trap concentration from a spectrum. Fora transient

of amplitude AC, the double-sampled peak amplitude S,eax is given by
Speak = AC({e~#/7 — e~*2/7), (1.9)

where 7 is as defined in Eq. 1.6. Combining Eqs. (1.6) and (1.9) yields

2N 4,

N =~ Gert — ental) Pear

(1.10)

As before, C is the capacitance at the quiescent reverse bias and NV in the
concentration of shallow donors in the n-type region. Thus, for fixed ¢, and
ta, the number of traps is proportional to the peak amplitude.

In addition to providing a convenient method for monitoring the occu-

pation of charge traps, the depletion region affords another handy feature.

Since the depletion width is easily adjusted by varying the applied reverse
bias, we can choose the portion of the material that we would like to probe.
We can generate spectra at various quiescent biases using small filling pulses.
. Analysis of the peaks produced yields the trap concentration at the various:
distances from the interface. Alternatively, we can fix the reverse bias and
take spectra with different filling-pulse amplitudes. The differences in peak .
amplitudes can then be used to calculate the trap concentration as a function

of the distance from the junction z.

The activation energy £, can be measured by taking spectra at a number
of different rate settings. The peak will shift to higher temperature as the
selected rate is increased. The transient rate a at any given temperature is
given by®

a= ate exp(-Es /keT), (1.9)
where o, is the trap capture cross section, ¥,, is the average electron ther-
mal velocity, N, is the effective density of states at the conduction band
edge, and g is the degeneracy of the level. The exponential prefactor has
a, T? temperature dependence {if the capture cross section is temperature
independent), so &, can be found by plotting the logarithm of a/ T 2 versus
the inverse of the temperature. The values of a are the rates selected by é,
and f, (a = 1/7), and the temperatures are those at which the peak occurs
for each selected rate. The slope of the line in this Arrhenius plot is then

This activation energy is a well-defined property of the particular trap

in question — it is the activation energy for thermally stimulated emission
of charge carriers by the defect in a depletion region. As such, it is an-
excellent way of identifying the defect. However, the relationship between
this energy and the position of the defect level in the bandgap is not so clear. .
In addition to the T? factor mentioned above, the exponential prefactor may
have a temperature-dependent contribution from the capture cross section .
g,. This is the result of thermally-activated capture processes. Further, the
measured level of the energy is that for a trap in a region of high electric
field, since depletion region fields are of the order of 10* V cm=!. This field
may significantly alter the energy required to escape from the trap.

The primary measurements made by DLTS, then, are as follows: a) the
activation energy is measured by varying the rate window; b) the average
trap concentration is calculated from the peak height when the filling pulse
is large enough to fill traps throughout the depletion region; and c) the spatial .
profile of the trap concentration is obtained by varying the reverse bias or

the filling-pulse amplitude to probe different parts of the material.

1.3.5 Experimental Setup

A block diagram of the experimental setup for DLTS is shown in Fig.
1.7. The sample diode is mounted in a variable-temperature system. The
pulsed bias voltage is applied to it, and the capacitance is measured across
its terminals. The capacitance transients are fed into a rate window for anal-
ysis as the temperature is varied. The rate window output is plotted as a

function of the sample temperature. For the DLTS measurements reported

Figure 1.7: Schematic experimental setup for DLTS.

(2-4)
TVNDIS SLC

TOULNOO
‘dWaL

MOGCNIM
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+ 4
A ¥

+»
ro

Qala
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in this thesis, a one-megahertz Boonton Model 72BD capacitance meter was
used in most cases; a few of the measurements required the high speed re-
sponse afforded by a home-made 20-MHz capacitance bridge (see Appendix
for details). A PAR Model 162 double boxcar integrator served as the rate
window. The temperature was measured by a copper-constantan (type T)
thermocouple. The boxcar output and thermocouple voltage were read by
a Hewlett-Packard desktop computer (either a Model 9825A or a Model 85)
which converted the thermocouple voltages to temperatures, recorded data
points approximately half a degree apart, plotted the data, and, upon com-
pletion of the spectrum, transferred the points to a PDP-11/34 computer for

storage and analysis.

1.3.6 Guidelines for the Application of DLTS

DLTS as an experimental] technique offers access to a number of trap
parameters, including emission activation energy and trap conceutrations,
which are not easily obtained by other methods. However, there are several
factors which limit its applicability in the investigation of semiconductor de-
fect properties. In particular, DLTS data do not provide any information
about the physical structure of a defect directly, thereby making accurate
correlation between a defect and its level difficult. Also, DLTS parameters
are difficult to compare to those obtained from other techniques. One prob-
lem is deducing the defect level from the measured value of the activation
energy, as pointed out in Sec. 1.3.4. Another is that DLTS measures the

number of electrically active traps, which may or may not be the actual

number of impurity atoms in the material. Comparing DLTS concentrations
to the total number of impurity atoms measured by a technique such as
Rutherford backscattering spectrometry is not straightforward.

The criteria for determining the applicability of the technique to any
material or structure may be summarized as follows: a) A DLTS measure-
ment of a material requires a p~n junction, Schottky barrier, or some other
structure that allows the user to change the size of the depletion region by
changing the applied bias. b) The experimental tools described in Sec. 1.3.5
are needed. c) The primary information obtained will be the activation en-
ergies and concentrations of the electrically active majority carrier traps in
the depletion region. Minority carrier information may also be obtained, but

requires additional equipment in the case of Schottky barrier samples.

1.4 Summary of Results of Thesis

Chapter 2:

Section 2.4: . Platinum-on-silicon structures annealed at temperatures
from 300 to 800 °C were characterized using Rutherford backscattering spec-
trometry (RBS), secondary ion mass spectrometry (SIMS), current-voltage
(I-V) and capacitance-voltage (C-V) measurements, and DLTS.

RBS spectra indicated the presence of Pt2Si at the surface of the 300 °C
sample and PtSi for the higher temperature samples. They also showed tails
at the low-energy end of the platinum signal in samples treated above 600 °C,
indicating some intermixing or the formation of islands on the surface.

DLTS spectra exhibited no traps in samples treated below 700 °C, Plat-
inum electron traps of activation energy 0.22 eV were observed in the 700 °C
sample at a concentration of ~ 10/4 cm~>, The concentration of the traps
ranged from 0.5 -- 2 x 1015 em™* in the region from 7 to 0.5 ym from the
interface in the sample treated at 750 °C for 30 min. The concentration
range was 0.3 — 1.8 x 101 cm7* for the samples annealed at 800 °C.

Section 2.5: Pailadium- and nickel-on-silicon structures annealed at
temperatures from 300 to 800 °C were characterized using RBS, DLTS, and,
in some cases, I-V and C-V measurements.

RBS spectra indicated surface silicide compositions of PdgSi for all pal-
ladium samples and NieSi (300 °C), NiSi (400-700 °C), and NiSiz (800 °C}
for the various nickel samples. RBS also showed degradation of the silicide

layers in all samples treated above 600 °C,

Only samples treated below 700 °C for palladium and 500 °C for nickel
_ had sufficiently low reverse leakage currents for DLTS measurements. Of all
these samples, DLTS showed traps above the detection limit of ~ 101! cm
only in the palladium sample treated at 700 °C. In that case, the DLTS
spectrum exhibited a peak at a temperature consistent with that expected
for a palladium electron trap at a concentration of a few times 10"! em-’,

Samples were also prepared for DLTS by removing the top 5-10 pin layer

of the palladium and nickel structures that had been annealed at 800 °C.

DLTS probes of this region — 5 to 10 ym from the original interface —

showed no traps in the nickel case. The spectrum for the palladium sample

had three peaks, each of which corresponded to trap concentrations below

5 x 10"! cm=?.

Section 2.6: Cobalt-on-silicon structures annealed at temperatures
from 300 to 800 °C were characterized using RBS and DLTS. RBS indicated .
no silicide formation for the 300 and 400 °C samples; CoSi (500 °C) and
CoSiz (600-800 °C) were seen in the spectra of the higher temperature sam-
ples. DLTS showed no traps in the samples annealed at or above 500 °C;
however, a trap of concentration ~ 10!? cm~* was detected in the 400 °C
sample,

Chromium-on-silicon samples which were annealed at temperatures from
300-800 °C were characterized by DLTS. Although reverse leakage currents
were sufficiently low for DLTS measurements in all of these samples, no traps

were detected.

Erbium silicide-silicon samples which were grown by annealing at 380 °C

for 50 min in vacuum or forming gas were characterized by DLTS. No traps
were detected in either case.

Summary: These results indicate several conclusions: a) The max-
imum safe temperature (below which indiffusion is negligible) for platinum
or palladium silicide on silicon is 700 °C; for nickel silicide on silicon, this
temperature is only 500 °C. 6) Cobalt indiffusion into silicon may be ote .
curring prior to the formation of a silicide layer at the surface, but there is
no evidence for contamination after the silicide has been formed or at high
temperature. c) Chromium silicide-silicon structures exhibit no degradation
or indiffusion of traps up to an annealing temperature of 800 °C. d) Erbium
silicide-silicon samples show no indication of indiffused traps at 380 °C re-
gardless of the annealing ambient. These investigations represent the first
collection of deep level indiffusion studies of transition metal silicides on

silicon.

Chapter 3:

DLTS measurements were carried out on p-n junctions made of four
compositions of Inj_,Ga,AsyP,_,. These samples, with bandgaps of 0.75,
0.83, 0.95, and 1.1 eV, covered the range of compositions that are lattice-
matched to InP. Except in one case, DLTS spectra exhibited no traps above
the detection limit of ~ 5 x 1015 cm~5. The trap that was detected in one
sample was attributed to a substrate lattice defect. These studies were the

first attempt to investigate deep levels in this quaternary alloy.

REFERENCES

K. Elliott, R. T. Chen, S. G. Greenbaum, and R. J. Wagner, Appl.
Phys. Lett. 44, 907 (1984).

S. M. Sze, Physics of Semiconductor Devices, Second Edition (Wiley
Interscience, New York, 1981).

G. L. Miller, D. V. Lang, and L. C. Kimerling, Ann. Rev. Mater. Sci.,
377 (1977). |

D. V. Lang, in Topics in Applied Physics Vol. 37: Thermally Stimulated
Relaxation in Solids, edited by P. Braunlich. |

CHAPTER 2

CHARACTERIZATIONS OF THE DEGRADATION OF
TRANSITION METAL SILICIDE — SILICON STRUCTURES

2.1 Introduction

| In this chapter, we discuss the results of a collection of measurements
on structures consisting of a thin film transition metal silicide on a sub-
strate of silicon. The primary techniques used were deep level transient spec-
troscopy, Rutherford backscattering spectrometry, and capacitance-voltage
and current-voltage measurements. We investigated platinum, palladium,
aud nickel silicides in detail. We also looked briefly at silicides of cobalt,

chromium, and erbium.
2.1.1 Applications of Transition Metal Silicides

Transition metal silicides are playing a part in today’s semiconduc-
tor technology by fulfilling requirements which cannot be met by other
maiterials.'—* A great deal of attention has been given to the use of sili-
cides in integrated circuits. A handful of silicides are also being investigated
for their use in long-wavelength infrared detectors.

The heart of progress in silicon integrated circuitry in its several years
has been the reduction of device size and the increase in packing densities.
Present chips can have devices with dimensions in the 1-2 wm range and as
Many as several tens of thousands of circuits on a chip which has an area of
only a square centimeter. This push to higher and higher levels of integra-
tion has been stimulated by the higher speed and lower power dissipation
associated with smaller devices. Additionally, manufacturing volume can be

maximized while costs are minimized.

One part of the effort to advance the level of integration in semicon-
ductor chips is the introduction of new materials. An example is the case
of materials for gates and interconnections. Polycrystalline silicon has been
. widely used in the past, but as device dimensions shrink to the submicron
scale, the high resistivity and large grain size associated with this material
begin to limit its applicability. The major requirements for a suitable mate-
tial are: a) low resistivity, b) high-temperature processing compatibility, e)
ability to withstand processing chemicals, and d) compatibility with present
production technology. Several transition metal silicides (TMS’s} can meet
all these criteria. Their resistivities are typically on the order of 10 pQ em —
quite comparable to metal resistivities. Melting temperatures are high, and
unlike pure refractory metals, the oxide (SiO2) formed on most TMS’s is non-
volatile and compatible with the other parts of the device. TMS’s are highly
resistive to the common chemicals used during cleaning and processing. And,
finally, these silicides fit conveniently into the present processing technology
becanse they are silicon-based. In fact, TMS’s are typically formed by a
solid phase reaction between a pure metal layer and the silicon on which it
is deposited. Thus, TMS’s are now being used as gates and interconnects in
recent chips.*

Another technology which may take advantage of the special properties
of silicides is infrared detection. While several groups are pursuing rela-
tively new material systems such as mercury telluride/cadmium telluride for
band-to-band photodetection, others are investigating the possibility of us-

ing low-barrier Schottky detectors on silicon. HgCdTe detectors offer several

advantages over the Schottky barrier systems. The overriding advantage of
the latter is that the materials difficulties of silicon are largely solved, while
fI-VI materials are still viewed as problematic virgin territory.

The operation of a Schottky barrier photodetector is based on the pho-
toexcitation of a carrier over the barrier. Thus, the longest wavelength de-
tectable is that with an energy equal to the barrier height. Since the region
of interesting wavelengths is 3-5 zm, the detector barrier height must be
~ 0.25 eV. Transition metal silicides offer a wide range of barrier heights on
silicon. Of particular interest are platinum and palladium silicides, which
have barrier heights of 0.23-0.34 eV on p-type silicon, and erbium silicide,
with a barrier of 0.39 eV on n-type silicon. Platinum silicide-silicon Schot-
tky barriers have been demonstrated as excellent detectors in the 1.2-4.7 ym

wavelength region.®
2.1.2 Goal of Our Investigations

As described in Chap. 1, the majority of transition metals form one
or more deep level defects in silicon. Gold is commonly used to kill carrier
lifetimes in devices, and platinum has been investigated for this application
also. Clearly, any indiffusion of transition metals from the silicide layer in a
device during annealing stages of the processing could alter the underlying
silicon. A knowledge of the effects of annealing on the metal diffusion into
silicon is therefore important in considering any silicide for use in a device.

However, the standard techniques presently used to study silicide-silicon

structures cannot provide the sensitivity required to detect the small quan-

tity of transition metal contaminants which can poison the underlying silicon
(> 10'! cm7*). The most common of these is Rutherford backscattering
spectrometry (RBS), which is widely used to determine silicide composition.
RBS has a sensitivity of ~ 0.1 at.% and is therefore not very useful for ob-
serving minute concentrations. Auger electron spectroscopy (AES) has an
advantage over RBS in that it provides excellent lateral resolution, but its
atomic sensitivity is approximately the same. Secondary ion mass spectrom-
etry (SIMS) at its best can detect 1 ppm or ~ 5 x 10! cm in silicon,
but it requires a calibration sample for the extraction of absolute numbers.
The removal of the silicide layer is also necessary — a nontrivial process for
most silicides, since they tend to be highly resistive to all etches except those
which also consume the underlying silicon.

Deep level transient spectroscopy (DLTS) is a technique ideally suited
for this application. This method can detect traps in the depletion region
of the Schottky barrier, as opposed to the previously mentioned techniques,
which measure atoms near the surface. Thus, DLTS gives a direct measure of
the number of centers affecting the free carrier concentration. Its sensitivity
is 10~* ~ 10~* times the shallow dopant concentration, so it is possible to
detect in the interesting concentration range. In addition, DLTS can probe
as far as several microns away from the interface, while the beam techniques
are not useful more than about 0.3 wm from the surface.

The purpose of the investigations discussed in this chapter was to use
DLTS to search for deep levels in the depletion regions of silicide-silicon

samples annealed at various temperatures. We were thus able to simulate

the high-temperature processing steps which occur in the fabrication of an
integrated circuit and determine the effects of indiffusion of the transition

metal.

2.2 Measurements Used to Study Silicide Silicon Structures

| Deep level transient spectroscopy (DLTS) and Rutherford backscatter-
ing spectrometry (RBS) were the primary techniques used to investigate the
silicide-silicon structures. Characterizations of the Schottky barrier diodes
used in the DLTS studies were carried out by current-voltage (I-V) and
capacitance-voltage (C-V) measurements.”

DLTS observed traps in the depletion region of the reverse-biased Schot-
tky barrier formed by the silicide-silicon structure, in our case, ~ 0.5—7 pm
from the interface. For our samples, trap concentrations above 5 x 101! /em*®
could be detected by DLTS. RBS detects atom impurity concentrations
greater than about 0.1 at.% (5x 10!° atoms/cm’ in silicon) within ~ 0.3 ym
of the interface of the structures. It is important to note that the two tech-
niques measure what are probably physically different configurations of plat-
inum impurities, since RBS measures total atomic concentration and DLTS

measures only the electron traps.
2.2.1 Rutherford Backscattering Spectrometry

An overview of the DLTS measurement was given in Chap. 1 of this
thesis. Here, we provide a brief summary of the features of RBS which
pertain to our measurements.

RBS is executed as follows:® a high-energy, monoenergetic beam of light
ions (e.g., *He*) impinges on a sample perpendicular to the surface. The

ions are scattered by the atoms of the sample — some backwards, out of

the sample, and others forward into the material. Ions backscattered at a
fixed angle, typically 170° from the incident beam, are detected. An RBS
spectrum is a plot of the number of ions as a function of their backscattered
- energy. Figure 2.1 shows the experimental setup. | |

Deducing qualitative information about the sample from the spectrum is
quite simple; quantitative results require some analysis but are also straight-
forward. Since almost all of the RBS spectra to be discussed in this thesis
are for silicon substrates with thin film overlayers of a mixture of silicon and
a metal, we describe here a generic spectrum of this sort. Figure 2.2 is a rep-
resentation of such a spectrum. M is a transition metal much heavier than
silicon. The thin film overlayer has equal numbers of M and Si atoms. The
spectrum has been taken with 2 MeV *He* ions impinging on the surface
and with the detector at 170°.

The following intuitive guidelines form the basis for understanding this
spectrum: a) Helium ions scattered by M atoms at the surface have energies
closer to 2 MeV than ions scattered by silicon atoms at the surface because
the mass of the M atoms is greater than that of ‘the silicon atoms. These
surface scattering energies are marked by arrows in Fig. 2.2. 6) The energy
of ions scattered by M (or Si) atoms at the surface is higher than the energy
of ions scattered by M (Si) atoms deeper in the material. This effect is the
result of the energy loss of the ions as they travel through the material.
Thus, signal at energies just below the surface scattering energy for M (Si)
corresponds to M (Si) atoms just below the surface. This feature enables us

to measure the film thickuess from the spectrum. In addition, if the surface

Figure 2.1: Diagram of an RBS setup. The pathway of the ions must be
a vacuum to prevent scattering by atoms other than those in the sample.

(From Ref. 8.)

iN
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/ \
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Figure 2.2: Sample RBS spectrum. The inset shows the structure from

which the spectrum is generated.

BACKSCATTERING YIELD (COUNTS)

Si 2 MeV
* et
MSi [~
St
NY
06 68 10 lz 4 16 18 2.0

BACKSCATTERING ENERGY (MeV)

or interface of the sample is not smooth, the low-energy end of the metal
signal and the step in the silicon signal will not be abrupt. c) The number of
backscattered ions depends on the number of atoms present and their cross
section for scattering. The silicon signal exhibits a step because the density
of silicon atoms in the substrate is greater than that in the thin film. Also,
while the thin film has equal numbers of M and Si atoms, the signal from
the M atoms is greater because the larger M atoms scatter the ions more
effectively. For samples in which the thin film composition is not known, it
can be computed from the ratio of leading-edge signal heights.

The main items to be extracted from an RBS spectrum, then, are: a)
the ratio of the number of metal atoms to the number of silicon atoms in
the film; 6) the thickness of the film; and c) the smoothness of the surface
and interface. The chief limitations of RBS in our application were the short
depth scale and low atomic sensitivity, which did not allow for reasonable
comparisons between the DLTS and RBS diffusion data. Also, the lack of
lateral resolution made it impossible to determine whether the blurred low-
energy signals were caused by intermixing of silicon amd metal atoms at the
interface or surface irregularities. Thus, in the discussions that follow, RBS
was used primarily as a tool to determine the composition of the silicide and

check for gross degradation.

2.3 Sample Preparation

‘The silicon substrates used to fabricate samples for these studies were 7-
_ 10 2 cm n-type (100) silicon. wafers from Wacker. Wafers were ultrasonically
cleaned in organic solvents and then subjected to a standard chemical clean-
ing procedure in which the final step was etching in an HF solution. They
were then immediately loaded into an ion-pumped vacuum system, where
a thin (~ 500 A) metal film was electron-beam deposited at a pressure less
than 3 x 1077 Torr. During the evaporation, a portion of each wafer was
covered by a mechanical mask with 0.75-mm-diam holes to make diodes for
the electrical measurements.

The wafers were diced, and pieces with broad-area metal coverage were
annealed with diodes in a vacuum furnace at pressures below 10~* Torr
at temperatures from 300 to 800 °C. Ohmic contacts to the diodes were
made by rubbing In-Ga onto the backs of the substrates. Diodes used for
DLTS studies were mounted on headers and wire-bonded. The samples with
broad-area silicide coverage were used for the backscattering analysis. Fur-
ther, in some cases in which DLTS measurements could not be made on the
silicide-silicon structure due to the degradation of the Schottky barrier, a
corresponding broad-area piece was etched in 3HNO3:1CH; COOH:0.4HF to
remove a 5-10 pm layer. Gold dots were then evaporated onto the freshly
exposed silicon, and these diodes were prepared as above for DLTS measure-

ments.

2.4 Results for Platinum Silicides

"We observed platinum diffusion into the silicon underlying various PtSi
. films. Silicon substrates covered with platinum films were annealed at tem-
peratures from 300 °C to 800 °C for times between 30 and 180 minutes to
form the silicide. RBS spectra showed no degradation of the silicide in the
samples treated below 700 °C. DLTS electron trap concentrations in samples
treated below 700 °C were below the DLTS detection limit of 5x 1011 cm-°.
Trap concentration profiles revealed ~ 5x 1011 to ~ 10!* traps cm~® in sam-

ples annealed between 700 and 800 °C.
2.4.1 RBS Measurements

Backscattering spectrometry using 2-MeV *Het ions was carried out on
these samples. Figure 2.3 shows three of the resulting spectra. Analysis of
‘the spectra using the ratio of the Pt signal leading-edge height to the Si signal
leading-edge height yields compositions consistent with PtSi for the 300 °C
sample and PtSi for all higher temperature samples. The film thickness for
each of the PtSi samples is approximately 1000 A. The solid line in Fig.
2.3 shows the spectrum for the PtSi sample which was annealed at 600 °C
for 30 minutes. This and all samples treated at lower temperatures exhibit
Pt signals which fall off sharply on the low energy end, indicating abrupt
silicide-silicon interfaces and smooth silicide surfaces. These Pt signals fall
off as sharply as do Pt signals in the case of unannealed samples (Pt on Si}.

Samples annealed at 700 °C and at 750 °C (not shown in the figure)

Figure 2.3: RBS spectra for PtSi-Si structures plotted on a semilog scale.
These spectra were taken with the beam of 2-MeV *Het ions incident normal

to the sample and with the detector at a scattering angle of 170°.

BACKSCATTERING YIELD (COUNTS)

re
ur

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vy

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(100) a

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800°C 30min °
800°C [80min a

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12 14 6 1.8 2.0

ENERGY (MeV)

exhibit very small tails at the low energy end of the Pt signal. However,
a significant platinum tail is seen in the 800 °C samples. Inspection of the
surface with a low-power optical microscope reveals a smooth topology, but
SEM images reveal features approximately one micron wide. Thus the tail
-. could correspond to a nonabrupt interface between the silicide layer and the
substrate, or it could be a result of the surface roughness. The circles in Fig.
2.3 show the RBS spectrum for PtSi annealed at 800 °C for 30 minutes. The
tail at the low energy end of the Pt signal for this case is almost a straight line
on this semilog plot. If we assume that it results from a nonabrupt interface,
the slope of the tail corresponds to a decrease in the Pt atomic concentration
of approximately one order of magnitude for every 0.2 um from the interface,
with a Pt concentration of ~ 3% at a distance of 500 A from the interface.
The squares in the figure represent the spectrum for the sample treated at
800 °C for 180 minutes. In this final case, the low energy end of the platinum
‘signal exhibits a large tail which is not a straight line. Here, the onset of the
disintegration of the PtSi film is evident, as the number of counts at the peak
of the platinum signal is approximately ten percent less than in the samples
which were treated for a shorter time. This effect is seen more clearly in Fig.
2.4, where the spectrum is shown plotted on a linear scale. |

To date, few attempts have been made to measure transition metal
diffusion into silicon from a silicide at the surface using RBS. Ishiwara et
al.° have reported the observation of platinum diffusion by backscattering
spectrometry for PtSi on (100) and (111) oriented silicon wafers. Our RBS

spectra for (100) wafers show significantly less motion of the platinum atoms

Figure 2.4: RBS spectra for PtSi-Si structures plotted on a linear scale.

These data are the same as those in Fig. 2.3.

BACKSCATTERING YIELD (10> COUNTS).

Si
(100)

\ ANNEAL

ati ten

si! |
(130) !P*S'"5'0 Mev

600°C
800°C
800°C

30 min
30 min
180 min

co]

oe!

than theirs. In our sample which was annealed at 800 °C for 3 hours, we
measure 22% platinum diffusion in contrast to 53% for a 2-hour 800 °C
treatment reported by Ishiwara. Here, the percentage of diffused metal atoms
_ is defined as the ratio of the area under the Pt tail to the total area under
the Pt signal, and we have assumed as they did that the tails correspond
to diffusion of platinum. Their samples were prepared in a manner very
similar to ours, with the exception that their evaporations were carried out
at pressures about an order of magnitude lower. The doping level in their
substrates may also have been different, as the only information given about
their substrates is the orientation. These differences may account for the

disparity in the results.
2.4.2 Secondary Ion Mass Spectrometry Results

DLTS studies can provide information about traps in a region from
approximately 0.5 to 7 wm from the interface, while the RBS spectra give
insight about the silicide layer. In an attempt to obtain platinum concentra-
tion information in the portion of the material between these two regions,
we turned to the secondary ion mass spectrometry (SIMS) technique.

SIMS is a method for the characterization of the atomic composition of
a material. Energetic ions (typically oxygen or cesium) bombard a surface,
causing secondary ions to be ejected from the material. These ions are mass-
analyzed to determine their species. Since the incident ions sputter away a
small crater on the surface, depth information is obtained by monitoring the

signal as a function of time.

SIMS analyses were carried out on samples annealed for 30 min at 700,
750, and 800 °C, and samples annealed at 800 °C for 60 and 180 min. These
samples consisted of a 1000 A layer, in which the platinum concentration
_ was 50 at.%, on top of a substrate which was almost entirely silicon. It was_
in the latter region that we wished to measure the platinum concentration.
Thus, it was necessary to eliminate the silicide overlayer to prevent the large
numbers of platinum atoms in that layer from travelling into the underlying
silicon and affecting the measurements in that region. Unfortunately, PtSi
is a material highly resistive to chemical etches. According to Murarka,!°
for example, PtSi is insoluable in aqua regia, HC], HNOs, H,S0,, HF, or
H,SO, + H2Cg, and is only slightly soluable in HF + HNO3. We required
an etch that would not consume the silicon under the silicide film, so the
HF + HNO etch was not suitable. We therefore attempted to etch the
silicide selectively by immersing each sample in a dilute HF solution and
then immediately transferring it to a hot 2:1 HCI + HNO; solution. The
role of the first etch was to consume the thin layer of native oxide, SiQg,
which grows on the silicide surface. The second etch then eliminated the
silicide layer but did not etch the underlying silicon. This etching process
resulted in a pitted and marred surface, but it did remove a large portion of
the silicide.

Our SIMS measurements were made by Charles Evans and Associates
of San Mateo, California. Both oxygen and cesium bombardment were used.
Oxygen ion bombardment proved to be the better method, because cesium

bombardment did not provide sufficient depth resolution. Figure 2.5 shows

Figure 2.5: Platinum ion intensity as a function of sputtering time for the
etched PtSi sample annealed at 800 °C for 30 min — SIMS raw data. (From

Charles Evans and Associates.)

ION INTENSITY Ccounte/ecec?

REAL TIME DATA

CHARLES EVANS & ASSOCIATES S-14~84 DEPTH PROFILE
7 6> 8@s-38
10 1 mi t T 3
5 TOTAL SPUTTERING TIME 627 SEC. =
sf 4
10°,
se 4
; —
yo*L_
E 3
5 Cc “a
| ~|
56 a
5s 4
J A
a -_
q0*E ed
5s & 3
o 4
nn “|
| thy :
10 Le ‘A atti!
~ ———————— "i hs iy 1
7 i th Y ir
Ss — ui I
1 4 1 L
rs) 180 382 542

SPUTTERING TIME ‘sec?

the raw SIMS data for the sample which was annealed at 800 °C for 30
min. Here, the ion intensity is plotted as a function of the sputtering time.
The signal drops by over three orders of magnitude in approximately 400
_ sec. The sputtering time is converted to a depth scale by using a Dektak
stylus profilometer to measure the depth of the crater after sputtering. An
RBS spectrum of the sample (taken after the etching procedure) provided
information about the atomic percentage of platinum at the surface; this
value was used to calibrate the ion intensity so that it would be possible to
obtain a plot of the platinum concentration as a function of depth. Such a
plot is shown in Fig. 2.6 for the raw data of Fig. 2.5. a

All SIMS profiles for the five different samples were almost identical to
the profile shown in Fig. 2.6. The initial spike in intensity and subsequent
dip were caused by oxide contamination at the surface of the sample. It
is therefore reasonable to assume that only data for depths greater than
~ 200 A were valid in these profiles. The peak (at 200 A) corresponded to
concentrations of 1 to 5 x 1071 cm~® in all samples. Profiles indicated that
the platinum concentration dropped to the detection limit of approximately
101° at depths of 0.15 to 0.2 wm in all samples. There were no significant
differences in the shapes of the profiles. |

The primary problem in interpreting these SIMS results was that not all
the platinum-rich silicide layer was removed from the samples. As mentioned
previously, the higher temperature samples exhibited surface “islands” in
SEM scans of the unetched silicide surface. Surface irregularities abounded

in the etched samples as well, and were observed by optical microscopy. As

Figure 2.6: Platinum conentration as a function of depth from the (etched)
surface, These data were obtained by processing the data of Fig. 2.5. (From

Charles Evans and Associates.)

CONCENTRATION Catome/co>

1°?

ia’?

1 gp?”

1 g??

CHARLES EVANS & ASSOCIATES

PROCESSED DATA

5~14-84

8) 680~32

DEPTH PROFILE

prey T Veryprrer

i Pep oy reVeryp ray 7 rryprny

TT Le LL |

ToTygT pry

\pe

&. 85 3.18
DEPTH

a, 1i8

(microne)

2. 22

@. 25

these islands were probably composed of platinum-rich material, they may
have served as sources for platinum which was driven into the underlying
regions during the sputtering process. Thus, platinum signal attributed to
the platinum concentration in the silicon may actually have been the result of
. jon beam mixing of the materials. Also, since the islands varied in size and
surface coverage, comparisons between the profiles of the various samples
were difficult to make.

Thus, SIMS evaluations of our samples were severly limited by the lack
of a good technique for the selective removal of the PtSi thin films. A possi-
ble solution to this problem might lie in the use of a plasma etching method.
The resulis obtained on these samples indicate only that the platinum con-
centration in the region between the interface and the beginning of the DLTS

profile region varies from 10 at.% to less than ~ 10'* em7°.

‘2.4.3 1-V and C-V Measurements

Current-yoltage measurements were made for two reasons: first to de-
termine whether or not the device in question had sufficiently low reverse
leakage currents for use in DLTS, and if so, to determine the barrier height
from forward-bias plots of the logarithm of the current as a function of the
voltage — log{I) vs V. In the case of our PtSi-Si samples, only those an-
nealed at 800 °C had reverse leakage currents greater than or equal to 1 wA
at a reverse bias of 5 V. Samples treated at 800 °C for 30, 60, and 180 min
had average leakage currents of 1, 1.3, and 3.6 wA, respectively, at V = 5 V.

All the devices were therefore suitable for DLTS measurements. -

A typical forward-bias log(I) vs V plot is shown in Fig. 2.7. A fit of the
region marked yields a built-in voltage of 0.78 V. This barrier height was
obtained for essentially all of our samples. The value is consistent with the
_ value reported in the literature for Pt,Si on Si,)! which is lower than that
reported for PtSi on Si (0.87 V).!! Thus, it is possible that our samples have
a. very thin interfacial layer composed of Pt2Si which is fixing the barrier
height at 0.78 V. Since this layer is not seen in the RBS spectra, it would
have to be less than 200 A thick. Since I-V data were taken only at room
temperature, the ideality factor was not measured.

Capacitance-voltage measurements were made on each device used in
the DLTS study to determine the shallow dopant concentration, Ni, and
the capacitance at the DLTS reverse bias voltage, C(V). These values are
needed to compute the trap concentration from the DLTS peak amplitude
(see Sec. 1.3.4). Since C is proportional to the square root of Na] (Vii-+V);
Nx, can be extracted from the slope of a plot of 1/C? vs Y. Figure 2.8 shows
a typical 1/C? vs V plot for one of the PtSi-Si samples annealed at 800 °C
for 30 min. NV has been calculated as a function of the reverse voltage also
and is shown in Fig. 2.8; its average value is 6.6 x 10'* cm-*. This C-V
measurement was made at 130 K. |

Tn addition, the Schottky barrier height was computed from the intercept
on the voltage axis. The extrapolation of the data to this axis, shown as a
dotted line in Fig. 2.8, yielded an intercept of 0.66 V. The barrier height
was then calculated to be approximately 0.75 eV, in reasonable agreement

with the value obtained by I-V.

Figure 2.7: log(I) vs V plot for a PtSi sample annealed at 800 °C for 30
min. These data were taken at room temperature. The vertical bars indicate

the region used for the fit.

im
J oo
rs
4e-
* ; is 8)
+ 4 wo
; .
t 4 v
{0
7™
hy
_—
a and 4 1 L a
i t t ! ! !

(v /DDOT

VOLTAGE (V)

Figure 2.8: 1/C? vs V and Ni vs V plots for a PtSi sample annealed at

800 °C for 30 min. The dashed line indicates the extrapolation of the data.

(,-ad 501) O/T

REVERSE VOLTAGE (V)

2.4.4 DLTS Measurements

- The DLTS trap measurements were made using a Boonton Model 72BD
capacitance meter. A double boxcar gating scheme was used to analyze
the capacitance transients of the Schottky barrier diodes. A typical DLTS
spectrum for a sample with a detectable concentration of platinum traps is
shown in Fig. 2.9. For a scanning time constant of 18.2 ms, no other traps
were observed in the samples up to 350 K. The trap observed was found to
have an activation energy of 0.22+0.015 eV, which is in excellent agreement
with the value given by Brotherton ef al.!? for the platinum electron trap in

silicon.

By applying reverse bias voltages from 2 to 25 V and changing the am-
plitude of the trap-filling pulses, we were able to observe electron emission
from platinum traps in a region from 0.5-7 4m from the interface. The ‘trap
concentration profiles obtained by this method are shown in Fig. 2.10 for
the samples which had detectable platinum trap concentrations. In the sam-
ple annealed at 700 °C for 30 minutes, we measure trap concentrations of
~ 5x10" cm7® which are just within our detection limit, Trap concen-
trations are approximately 10!° and 10!* for samples treated at 750 °C and
800 °C, respectively. The concentration profile for the sample which was
annealed at 800 °C for 180 minutes falls off more slowly with distance from
the interface than that for the sample annealed at the same temperature for
30 minutes, but the concentrations 0.5 ym from the interface are relatively

close.

Figure 2.9: Platinum electron trap seen in DLTS spectrum taken with time
constant of 18.2 ms. E, is the trap activation energy measured relative to

the conduction band (CB).

DLTS SIGNAL

1 acest tes nt a einer ees 1 omen ee T
Pt electron trap
E,70.22ev to CB 1
T =18.2ms |
-2 ro | oe er cee deel L at L a 1. i 4 J, i 1 a r
50 100 50 200 250 300

TEMPERATURE (Kk)

Figure 2.10: Platinum trap concentration profiles obtained by DLTS. The

solid lines are representative erfcs.

Pt ELECTRON TRAP CONCENTRATION (cm7>)

TT TTT

or
By

T TOT PIre

19!

eka

fo)
oe

PLATINUM TRAP CONCENTRATION
PROFILES MEASURED BY DLTS

. 800°C 180 min

Db GORE

° ° 700°C 30 min

T TTT]

| aa a l ! | a

2 3 4 ) 6 ia
DISTANCE FROM INTERFACE (ym)

Au extrapolation of the RBS data, discussed in Sec. 2.4.1, indicated
that the platinum atom concentration falls off by an order of magnitude in
2000 A (under the assumption that the RBS Pt tails were due to platinum
at the interface). Since this fall off would correspond to an almost vertical
line on the plot of Fig. 2.10, it is clear that the extrapolation of the RBS
data is meaningless in the region of the DLTS measurements.

For simple diffusion of platinum from an infinite source at the surface,
the concentration distribution at any temperature would be described by a
complementary error function (erfc}. The profiles we have measured are not
in general described by complementary error functions, as our DLTS profiles
bend in the opposite direction from erfcs. Thus, the distribution of platinum
traps which we have observed is not due to simple diffusion. However, our
profiles are similar in shape to the diffusion profile of gold in silicon, measured
in Ref. 13 by radiotracer experiments. The profile in that case is thought
to be a result of the interaction among Au atoms in substitutional sites,
Au atoms in interstitial sites, and silicon self-interstitials.‘4 A similar theory

could explain our platinum trap diffusion profiles.
2.4.5 Summary of Platinum Results

Analyses of the RBS spectra of our samples yielded silicide compositions
of Pt,Si for the sample annealed at 300 °C for 30 min and PtSi for samples
annealed from 400 to 800 °C. Noticeably nonabrupt low-energy fall-offs were
observed for the platinum signals of samples annealed at 800 °C. The spec-

tra showed that the PtSi phase is maintained at the surface at 800 °C for

annealing times less than 3 hours.

SIMS studies were thwarted by the need for a method to etch the PtSi
films selectively and completely.

C-V measurements were used to obtain values for N, and C(V) for mak-
ing trap concentration measurements by DLTS. I-V measurements showed
that all the PtSi samples had very low reverse leakage currents, and could
therefore be used for DLTS. Also, barrier heights were measured using I-V
techniques.

Our DLTS studies of platinum diffusion into (100) silicon substrates
from PtSi showed that there is no observable diffusion at temperatures below
700 °C for our samples. The electron trap concentration measured by DLTS
ranged from 2.0-0.5x101* cm~$ in the region from 0.5-7 yum from the inter-
face for the sample treated at 750 °C for 30 minutes. In the 800 °C samples,
the concentration range was 1.8-0.3x10'4 cm~*. Thus, we conclude that
700 °C is a safe temperature below which the silicon is not poisoned by the

diffusion of platinum electron traps.

2.5. Results for Palladium and Nickel Silicides

In this section, we report the observation of the thermal degradation of
several palladium silicide-silicon and nickel silicide-silicon structures. Silicon ©
substrates covered with palladium or nickel films were annealed at tempera-
tures from 300 °C to 800 °C for 30 minutes to form the silicides. RBS spectra
showed no degradation of the silicide in the samples treated below 700 °C
in either case; however, the degradation of the silicides was clear in sam-
ples annealed at 700 and 800 °C. Reverse-biased leakage currents increased
with increasing annealing temperature in both cases. The degradation was
almost negligible for palladium samples at temperatures which caused the
nickel silicide barriers to become very leaky. A very small concentration
(~ 5x 10!! cm7*) of traps was detected for the high-temperature palladium
samples. For the nickel samples which were still reasonable barriers, DLTS

showed no traps.

2.5.1 RBS Measurements

RBS spectra were taken for the samples to determine the composition
of the thin silicide layer and to check for surface smoothness and interface
abruptness. Analysis yielded surface silicide compositions consistent with
Pd,Si for palladium samples annealed at 300-800 °C for 30 min. Figure 2.11
shows the results for palladium samples annealed at 600, 700, and 800 °C.
The low-energy fall-off of the palladium signal is clearly less abrupt as tem-

perature is increased. This blurring could be due to the interface growing

Figure 2.11: RBS spectra for palladium-on-silicon structures. |

BACKSCATTERING YIELD (COUNTS)

v t qT LU

Pd on Si ANNEALED Pd
4 600°C 30min | |
io"r 700°C 30min ogg 7

800°C 30min oa

1.0

1.2 i4 1.6 8
ENERGY (MeV)

less abrupt, the surface morphology becoming rough, or a combination of
the two. Similar spectra for the nickel samples are shown in Fig. 2.12. RBS
indicates that the phase is NigSi for the 300 °C sample, NiSi for the 400-
700 °C samples, and NiSi, for the 800 °C sample. Again, we see the a tail
in the transition metal signal at its low-energy end. In comparison, spectra
for the platinum silicide structures discussed in Sec. 2.4.1 showed relatively
little blurring of the low-energy metal signal for samples annealed at these

temperatures.
2.5.2 1-V and C-V Measurements

Reverse-biased leakage currents at 5 V for nickel and palladium silicide
Schottky barriers annealed at various temperatures are given in Table 2.1.
Values for platinum silicide barriers are also given for comparison. The
degradation at a given temperature was more severe for palladium than for _
platinum, and even worse for nickel. Of the palladium samples, only those
treated at 700 °C and below had leakage currents low enough for DLTS
Measurements. The highest temperature nickel sample that was suitable for
DLTS was only annealed at 500 °C.

C-V measurements were only required for those samples used for DLTS.

They yielded values of Ny of ~ 5 x 10!* cm~* as expected.

2.5.3 DLTS Measurements

DLTS spectra were generated with a rate window of 55 s—! for the

samples which had sufficiently low reverse leakage currents. The spectra

Figure 2.12: RBS spectra for nickel-on-silicon structures.

BACKSCATTERING YIELD (COUNTS)

Oo
oy

600°C 30min Ni
| 700°C 30min o 7
800°C 30min a

T T
Ni on Si ANNEALED

| L
08 1.0 l2. 1.4 16 1.8
ENERGY (MeV)

500 °C 600 °C 700 °C 800 °C

Ni 67 pA 330 pA 2.2 mA 14 mA
Pd <1 pA <1 pA 9.1 pA 370 pA

Pt <1 pA <1 pA <1 pA 1 pA

Table 2.1. Leakage currents at 5 V reverse bias in nickel, palladium, and

platinum silicide samples annealed for 30 min.

exhibited no traps above a detection limit of ~5x10'! traps cm7*in any
nickel sample treated below 500 °C. Nickel samples which were treated at
temperatures above 500 °C had reverse leakage currents which made DLTS
. measurements impossible. A piece of nickel material which was annealed at
800 °C was etched and prepared as described in Sec. 2.3 to make DLTS
measurements in a region 5-10 ym below the original interface. Again, no
traps were detected.

In the case of palladium samples, DLTS spectra exhibited no traps above
the detection limit for the samples treated below 700 °C. A barely detectable
peak at a temperature of 120 K appeared in the spectrum of the Pd,2Si
sample annealed at 700 °C (shown in Fig. 2.13). Although the signal was so
small that it was not possible to make a measurement of the trap activation
energy, the location of this peak is consistent with the reported activation
energy of 0.22 eV from the conduction band.!5 Thus, we believe that. the
peak represents a small concentration (~ 1011 cm7*) of palladium electron
traps.

Palladium samples which were treated at temperatures above 700 °C
had high reverse leakage currents. As in the case of the high-temperature
nickel samples, a piece of 800 °C palladium material was etched to make
DLTS measurements below the original interface. The resultant spectrum is
shown in Fig. 2.13. Again, we saw a very small peak at 120 K which was
probably due to palladium electron traps. In addition, there were minute
peaks at 165 and 200 K which were not observed close to the interface in the

700 °C sample. Nor were these peaks seen in the nickel samples which were

Figure 2.13: DLTS spectra of palladium silicide samples taken with boxcar

gates at 5 ms and 45 ms for a rate window setting of 55 s7!.

(HX) SYALVYsAdW3L

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Mo ON Ne

UI OF DJo.O008

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VNOIS SLC

etched and prepared in exactly the same fashion. These signals may represent
the presence of a contaminant (such as iron, a fast diffuser in silicon) which.
could have been in the palladium charge material used to evaporate the metal
_ onto the silicon substrate. All three peaks correspond to trap concentrations

of ~10!! traps cm™°.
2.5.4 Summary of Palladium and Nickel Results

Our RBS studies showed a degradation of the silicide layers for nickel
and palladium silicides annealed at temperatures above 600 °C. The I-V
measurements indicated poor Schottky barrier behavior in nickel samples
treated above 500 °C and palladium samples treated above 700 °C. DLTS
measurements of the nickel samples with small leakage currents showed no
traps. An extremely small number of traps were seen in the 700 and 800 °C
palladium samples. Thus, we conclude that 700 °C may be regarded as the
maximum safe temperature at which palladium silicides may be annealed
before transition metal indiffusion begins to degrade the underlying silicon.
For our nickel silicide samples, the maximum temperature for good Schottky

barrier behavior is only 500 °C.

2.6 Results for Other Silicides

In this section, we describe the results of measurements of a group of
cobalt, chromium, and erbium silicide samples. The cobalt and chromium ©
samples were prepared as were the samples discussed in the previous sec-
tions, i.e., by vacuum annealing silicon substrates covered with pure metal
overlayers. RBS spectra showed no silicide formation in cobalt samples an-
nealed at 300 or 400 °C. The sample annealed at 500 °C was CoSi; samples
annealed at temperatures from 600 to 800 °C were CoSig. DLTS spectra of
these samples showed no traps for the structures annealed at temperatures

3 was seen in the

above 500 °C; however, a trap of concentration ~ 10)? cm~
sample annealed at 400 °C. DLTS spectra of the chromium silicide samples
showed no traps in samples annealed at temperatures from 300 to 900 °C.
The erbium silicide samples were provided by S. S. Lau of the University
of California at San Diego (UCSD). One set of these samples was prepared
by annealing at 380 °C for 50 min in a vacuum furnace; the other set was

treated similarly under a flow of forming gas {hydrogen + nitrogen}. DLTS

spectra exhibited no traps in either case.
2.6.1 Cobalt Silicides

RBS spectra were taken for the cobalt samples annealed at temperatures
from 300 to 800 °C. Figure 2.14 shows the results for the samples treated
at 400, 500, and 600 °C. The 300 °C spectrum was indentical to that for

400 °C, and spectra for samples annealed at 700 and 800 °C did not differ

Figure 2,14: RBS spectra for cobalt-on-silicon structures.

Le]
im

500°C 30min
600°C 30min

Co on Si ANNEALED
400°C 30min

foe
om

irre

+ 4) © ae oe

me) oun
(SLNNOD) GTSIA

oO
ONINALIVOSNOVE

ry]

ENERGY

0.6

eV)

—— eet

from the 600 °C case. No silicide formation was apparent in the 400 °C spec-

trum. Analysis yielded surface silicide compositions consistent with CoSi for

the cobalt sample annealed at 500 °C, and CoSi, for the higher temperature |
_ samples. The low-energy fall-off of the cobalt signal did not appear to blur.
as temperature is increased.

DLTS spectra were taken with a rate window of 55 s~!. The spectra
exhibited no traps above a detection limit of ~5x101! traps cm™> in any
sample treated at or above 500 °C. In addition, a piece of cobalt material
which was annealed at 800 °C was etched and prepared as described in Sec.
2.3 to make DLTS measurements in a region 5—10 wm below the original
interface. Again, no traps were detected.

However, the sample which was treated at 400 °C exhibited a peak
corresponding to a trap concentration of ~ 10! cm~*. This spectrum is
shown in Fig. 2.15. Ransom ef al.!® have recently reported similar findings:
for their cobalt-on-silicon samples annealed at 400 °C in helium or forming |
gas, they see a trap of concentration as high as 10/7 cm~* which is not
present in higher temperature samples.

Our RBS spectrum for the 400 °C sample showed that no silicide forma-
tion had occurred yet. However, the high-energy end of the silicon signal was
slightly blurred compared to the spectrum for unannealed cobalt on silicon.
Thus, it is probable that some intermixing did occur without formation of a
silicide. Ransom et al. did not mention any RBS or other results that would
indicate the degree of silicide formation in their samples. Our results indi-

cate the possibility that indiffused cobalt that has moved several thousands

Figure 2.15: DLTS spectrum of cobalt sample taken with boxcar gates at

5 ms and 45 ms for a rate window setting of 55 s~?.

BOLTS SIGNAL

DLTS SPECTRUM
Co on Si
ANNEALED 400 °C 30 min

seg Or ont “ neue
Sewer

igl2 tTRAPS/cM?

102+
158
208+
258+
306r

TEMP CK>

356

of angstroms into the silicon becomes electrically inactive at higher annealing
temperatures, perhaps because it precipitates out of the electrically active

sites.
2.6.2 Chromium Silicides

We used DLTS to investigate chromium silicide samples which had been
treated at temperatures from 300 to 800 °C for deep level contamination. ©
All of these samples maintained low reverse leakage currents. No traps were

seen above the detection limit of ~ 101! em~* in DLTS.
2.6.3 Erbium Silicides

DLTS measurements were carried out on erbium silicide samples an-
nealed at 380 °C for 50 min under vacuum and under a flow of forming gas.
I-V measurements on these samples, made at UCSD, showed significantly
greater reverse leakage currents in the case of vacuum annealing: average
leakage was only 0.87 A at 20 V for the forming gas samples compared to
5.5 vA for the vacuum annealed samples. Deep level indiffusion was thought
to be a possible cause of this discrepancy. However, DLTS measurements

showed no traps in either case.

2.7 Summary of Silicide Results

Platinum-on-silicon structures that were annealed at temperatures from

300 to 800 °C were characterized using Rutherford backscattering spectrom-

etry (RBS), secondary ion mass spectrometry (SIMS), current-voltage (I-V)

and capacitance-voltage (C-V) measurements, and deep level transient spec-
troscopy (DLTS).

RBS spectra indicated the presence of Pt,Si at the surface of the 300 °C
sample and PtSi for the higher temperature samples. They also showed tails
at the low-energy end of the platinum signal in samples treated above 600 °C,
indicating some intermixing or the formation of islands on the surface. SIMS
profiles were not very useful in our studies due to the difficulties involved in
preparing the surface properly; however, they did yield Pt concentrations
consistent with our other measurements.

I-V measurements showed very low reverse leakage currents and a barrier
height of 0.78 eV in the PtSi samples annealed up to 800 °C. C-V measure-
ments set the shallow donor level in the substrate at ~ 5x 10/4 cm7%, DLTS
spectra exhibited no traps in samples treated below 700 °C. Platinum elec-
tron traps of activation energy 0.22 eV were observed in the 700 °C sample
at a concentration of ~ 10'4 cm~*. The concentration of the traps ranged
from 0.5 — 2 x 10!* cm~° in the region from 7 to 0.5 wm from the interface
in the sample treated at 750 °C for 30 min. The concentration range was

0.3 ~ 1.8 x 10!4 cm7? for the samples annealed at 800 °C.

Palladium- and nickel-on-silicon structures annealed at temperatures

from 300 to 800 °C were characterized using RBS, DLTS, and I-V and C-V
Measurements. |
RBS spectra indicated surface silicide compositions of PdgSi for all pal-
ladium samples and NigSi (300 °C), NiSi (400-700 °C), and NiSi, (300 °C)
7 for the various nickel samples. They also showed a good deal of degradation
of the silicide layers in all samples treated above 600 °C. |
Only samples treated below 700 °C for palladium and 500 °C for nickel .
had sufficiently low reverse leakage currents for DLTS measurements. Of all
these samples, DLTS showed traps above the detection limit of ~ 10!1 em=*
only in the palladium sample treated at 700 °C. In that case, the DLTS
spectrum exhibited a peak at a temperature consistent with that expected
for a palladium electron trap at a concentration of a few times 10'1 cm~$,
Samples were also prepared for DLTS by removing the top 5-10 ym layer
of the palladium and nickel structures that had been annealed at 800 °C.
DLTS probes of this region — 5 to 10 ym from the original interface —
showed no traps in the nickel case. The spectrum for the palladium sample
‘had three peaks, each of which corresponded to trap concentrations below
5 x 1011 cm~*. One of these is the same as the palladium peak seen in the
700 °C sample; the others may be caused by indiffused impurities that were
present in the palladium charge material.
Cobalt-on-silicon structures which were annealed at temperatures from
300 to 800 °C were characterized using RBS and DLTS. RBS indicated no
silicide formation for the 300 and 400 °C samples; CoSi (500 °C) and CoSi,

(600-800 °C) were seen in the spectra of the higher temperature samples.

DLTS showed no traps in the samples annealed at or above 500 °C; however,
a trap of concentration ~ 10}? cm~* was detected in the 400 °C sample.

Erbium silicide-silicon samples which were grown by annealing at 380 °C
for 50 min in vacuum or forming gas were characterized by DLTS. No traps
were detected in either case.

These results indicate several conclusions: a) The maximum safe tem-
perature (below which indiffusion is negligible) for platinum or pajladium
silicide on silicon is 700 °C; for nickel silicide on silicon, this temperature |
is only 500 °C. 6) Cobalt indiffusion into silicon may be occurring prior to
the formation of a silicide layer at the surface, but there is no evidence for
contamination after the silicide has been formed or at high temperature. c)
Chromium silicide-silicon structures exhibit no degradation or indiffusion of
traps up to an annealing temperature of 800 °C. d) Erbium silicide-silicon
samples show no indication of indiffused traps at 3806 °C regardless of the
annealing ambient.

These studies represent the first collection of investigations of deep level
indiffusion from transition metal silicides on silicon. In addition to providing
the specific results for the silicides mentioned here, our investigations have
demonstrated the general applicability of DLTS to the characterization of

silicide-silicon structures.

REFERENCES

1. F. Mohammadi, Solid State Technol. 24, 65 (1981).

2. M-A. Nicolet and S. S. Lau, in VLSI Electronics: Microstructure Sci-
ence, edited by N. Einspruch (Academic Press, New York, 1983),
Vol. 6, Chap. 6.

3. §.P. Murarka, J. Vac. Sci. Technol. 17, 775 (1980).

4. J. M. Early, IEEE Spectrum 21, 38 (1984).

5. W.F. Kosonocky, H. G. Erhardt, G. Meray, F. V. Shallcross, H. Elabd,
M. J. Cantella, J. Klein, L. H. Skolnik, B. R. Capone, R. W. Tay-
lor, W. Ewing, F. D. Shepherd, and S. A. Roosild, Sec. Photo-
Opt. Instrum. Eng. 225, 69 (1980).

6. M. D. Miller, H. Schade, and C. J. Nuese, J. Appl. Phys. 47, 2569
(1976).

7. §.M. Sze, Physics of Semiconductor Devices, Second Edition (Wiley
Interscience, New York, 1981).

8. W.-K. Chu, J. W. Mayer, and M-A. Nicolet, Backscattering Spectrom-
etry (Academic Press, New York, 1978). |

9. H. Ishiwara, K. Hikosaka, and S. Furukawa, J. Appl. Phys. 50, 5302
(1979).

10. S. P. Murarka, Silicides for VLSI Applications (Academic Press, New
York, 1983), p. 68.

A.
12.

14.

15.
16.

100

J. M. Andrews and J. C. Philips, Phys. Rev. Lett. 35, 56 (1975).
§. D. Brotherton, P. Bradley, and J. Bicknell, J. Appl. Phys. 50, 3396
(1979).

. W.R. Wilcox and T. J. LaChapelle, J. Appi. Phys. 35, 240 (1964).
U. Gésele, F. Morehead, W. Frank, and A, Seeger, Appl. Phys. Lett.
38, 157 (1981).

L. So and S. K. Ghandhi, Solid-State Electron. 20, 113 (1977).
C. M. Ransom, L. Krusin-Elbaum, F. d’Heurle, and T. I. Chappell, Bull.
Am. Phys. Soc. 28, 1312 (1983).

101

CHAPTER 3

DLTS STUDIES OF In,;_,Ga,As,Pj_,

102

3.1 Introduction

In this chapter, we describe the results of DLTS studies of four compo-.
_ sitions of the quaternary alloy In,_,Ga,As,P)_,. . .
This introduction discusses the material system and its laser applications
— and limitations — that have been the subject of a great deal of interest
in recent years. Section 3.2 explains how the samples were fabricated, and
Sec. 3.3 describes the DLTS results and summarizes the conclusions of the

study.
3.1.1 The Inj_,Ga,As,P,_, Material System

The quaternary alloy In;_,Ga,As,Pj~_, is a relative newcomer to the
world of semiconductor technology, having been grown in laboratories for
only approximately 12 years.! Figure 3.1 shows the range of bandgaps and
lattice parameters that are possible by varying z and y between 0 and 1.
The four corners of the region represent the binary III-V materials GaP,
InP, InAs, and GaAs. Some properties of these endpoints are given in Ta-
ble 3.1. Each curve connecting these points represents a ternary alloy, e.g.,
In,;_,Ga,As between InAs and GaAs. From the figure, it is clear that par-
ticular values of z and y may be chosen such that the alloy is lattice-matched
to either GaAs or InP, and thus may be epitaxially grown on these mate-
tials with minimal strain and dislocations. Of greatest interest are the set
of compositions matched to InP, because these alloys have bandgaps that

cover a range that can be exploited for devices for lightwave communication

103

Figure 3.1: Bandgap as a function of lattice parameter for the possible
compositions of In;_,Ga,As,yP;_,. The dashed line shows the compositions
that are lattice-matched to InP, The points of discontinuous slope of the
boundary curves approaching GaP correspond to the transition from direct
to indirect bandgap. The scale on the right indicates the wavelength of a
photon with energy equal to the bandgap shown on the left scale. (Courtesy
of M. A. Pollack.)

BANDGAP,Eg (ev)

re)

ro)

ad
wu

104

l l ] L

InAs.

5.5

5.6 5.7 5.8 5.9
LATTICE PARAMETER,a ( A )

6.0

1.0

1.5
2.0

WAVELENGTH (ym)

(eV)
InP 1.28
InAs 0.36
GaAs 1.43
GaP 2.26
Si 111

Table 3.1. Properties of the four binary endpoints of In)_,GazAsyP)_y. Val-
ues for silicon are also given for comparison. Eg is the energy of the bandgap, -

w.the carrier mobility, and ¢, the relative dielectric constant. (Taken from

Ref. 2.)

105

elec
(em?V~!5-1)

4000
22600
8500
300

1350

hole
(cm?V—!3~!)

100
200
400

150

480

12.4
14.6
13.2

11.1

11.8

106

systems. These bandgaps range from 0.75 (Ino.33Gao.47As) to 1.35 eV {InP};
the corresponding wavelengths are from 1.66 to 0.92 zm. This region of the
spectrum includes the wavelengths of lowest loss and dispersion in modern
- optical fibers. | |
Among the other properties of Inj_,Ga,As,P,_,, its high electron mo-
bility is the most attractive. Table 3.1 gives values of carrier mobilities, Helec
and #hote, for each of the four endpoints of the system. The electron mobility
of InAs is especially interesting because it is approximately seventeen times
that of silicon. In,_,Ga,AsyP,_, alloys have room temperature electron
mobilities®:* from 3000 to ~ 11000 cm?V—!s—!. This fact has generated a
great deal of interest in the possibility of making integrated optoelectronic
circuits from In,_zGayAsyP,_, and Ing.53 Gag, 47As. |
Additionally, compositions of Inj_,GazAsyP\_, lattice-matched to InP
have relative dieletric constants €, greater than or equal to that for InP. Thus,
in Inj_,Ga,As,P,_, heterostructure lasers with InP cladding layers, the
sandwich structure acts as a waveguide, confining photons to the quaternary

layer to provide high gain.
3.1.2 Inj_,Ga,zAs,P,_, Lasers and Motivation for Studies

Semiconductor lasers are made from compositions of Inj_,Ga,As,P)_,
across the lattice-matched range. A typical laser structure is shown in Fig.
3.2. This step structure, with quaternary layers rather than InP adjacent to
the active region, is used because it yields higher quality layers. Electrons

and holes are injected into the active region by applying a bias to the device.

107

Figure 3.2: Layers of materials in a typical laser structure. The n-type
IuP epilayer is grown to provide a high-quality surface for subsequent layers.
The diagram on the right shows the bandgap energy corresponding to each

layer (without band bending).

108

Au contact

p* InP

p InGaAsP confinement layer

InGaAsP active layer

n InGaAsP confinement layer

—n InP epilayer

n* InP substrate

TTA

109

They are confined there by the larger-gap quaternary material on either side.
They recombine and emit photons with energy equal to the bandgap. If the
injection current density in the region is sufficiently high, stimulated emission.
results. | .

The current density at which lasing begins is referred to as the thresh-
old current density, Ji;. Ji, varies with the device temperature T. Em-
pirically, this temperature dependence is given by Ji, x exp(T/To), where
To =~ 100 K for T below room temperature and Ty) =~ 60 K for T above
room temperature.*® In addition, there is evidence that Tp is even lower
for longer wavelength (> 1.5 wm) quaternary lasers.° 7) values for GaAs-
Al,Ga,_,As lasers, a more established technology, are typically close to
200 K. Since low values of Tp) imply poor temperature stability, several
attempts have been made to understand and eliminate the cause of the rela-
tively low values obtained for In,.,Ga,As,P1_, lasers. One possible source
of difficulties was thought to be the existence of deep traps in the material
which could be acting as centers for nonradiative recombination, thereby
killing the gain in the active region. This fact was one of the main motiva-
tions for our DLTS studies. |

While many novel devices have been fabricated in this material, several .
basic materials problems still have not been addressed. Among these was
the question of deep level impurities. Our DLTS investigations were among

the first probes into this issue.

110

3.2 Samples

The four compositions of Inj_,Ga,As,P,_, used for this study are
listed in Table 3.2. These were selected to cover the most interesting range
of bandgaps for quaternary devices. Each sample was a p*t-n homojunction
grown by liquid-phase epitaxy (LPE) at approximately 640 °C as follows:78
The sulfur-doped n-type (100) InP substrate was etched back by an under-
saturated solution for 60 s. A buffer layer of tin-doped n-type InP was then
grown. An unintentionally doped n-type (Nz =~ 2-10 x 10!® cm~') layer
of the quaternary material followed. This layer was 0.75-3 ym thick in all
but one sample; in that sample, it was 15.5 wm thick. The final layer was |
Zn-doped p+-type InGaAsP. Gold was then electroplated onto the surface
to provide contact. These layers are shown in Fig. 3.2. All semiconductor
. layers were lattice-matched to the InP substrate to 0.05% or less in the sam-
ples. Devices were defined by cleaving in most cases, although mesas were
etched in a couple of cases. Individual devices were then mounted on TO-
16 headers and wire-bonded to provide electrical contact. Altogether, there
were four 1.1 ym wavelength samples, three 1.3 ym samples, three 1.5 um
samples, and four 1.66 zm samples. |

These samples were supplied by R. E. Nahory and M. A. Pollack and
fabricated by J. C. DeWinter, R. J. Martin, and E. D. Beebe of Bell Labo-

ratories.

111

Ey (eV) Ag (um) ¥

Li Li 0.17 0.37
0.95 1.3 0.26 0.60
0.82 1.5 0.41 0.88
0.75 1.66 0.47 1.00

Table 3.2. Compositions of samples used in this study. Ey, is the energy
of the bandgap. The wavelength listed for each case, Ay, is for a photon of

energy equal to the bandgap for that composition.

112

Figure 3.2: LPE-grown layers and gold contact in the samples used.

Au contact

‘p* InGaAsP (Zn doped)

InGaAsP (undoped)

n InP epilayer

n* InP substrate |

114

38.3 Results and Conclusions

- DLTS measurements were made using the Boonton Model 72BD capac-.
jtance meter. The double boxcar gating scheme was used to analyze the
capacitance change after a positive pulse was applied to the reverse-biased
pt-n junction. The detection limit was approximately 5 x 10! traps cm-?.
In all samples except one, no traps were observed above this limit.

The sample that did have a trap was made of the 1.3 ym material. Its
shallow donor concentration in the n-type region was 8 x 10° cm7*. This
region was 1 ym thick. The sample exhibited a majority-carrier (electron
trap) DLTS peak at approximately 200 K. This peak was only seen with
trap-filling pulses of durations longer than 100 ys, and a pulse duration of 10
ms was required to obtain the full peak magnitude. Since trap-filling pulse
durations are typically only around 10 ys in normal DLTS scans, these times
were extraordinarily long. They implied an extremely small capture cross
section of approximately 10-7? cm~?. The activation energy of the trap was
0.5 eV to the conduction band edge. The trap concentration fell off relatively
quickly into the n-type region; it dropped from 3 x 101° to 4x 10" em~* at
a distance of 0.13 pm from the junction.

As mentioned, this trap was not seen in any other sample — even others
made from material from the same growth. Thus, we conclude that it is
probably caused by a lattice defect in the substrate that propagated up into
the epitaxial layers. Such substrate lattice defects have been pinpointed as

the cause of occasional dead lasers in otherwise good batches.

115

Aside from this trap, our measurements show that various compositions
of Inj;_,Ga,As,P,—_, across the range that is lattice-matched to InP can be
grown on (100) with trap densities below 5 x 10'° traps cm *. Such low
densities can not be the source of the low Tp values found for quaternary
lasers. Since the time of this study, several other mechanisms have been
proposed and explored to explain the threshold temperature dependence.
Chief among these are Auger processes, intervalence band absorption, and
leakage currents over the confinement layers. At present, it is thought that
various Auger processes are the dominant factors in the reduced radiative

efficiency. 1°

116

REFERENCES

1. H. C. Casey, Jr. and M. B. Panish, Heterostructure Lasers Part B:
Materials and Operating Characteristics (Academic Press, Ney
York, 1978).

2. B. G. Streetman, Solid State Electronic Devices (Prentice-Hall, Engle-
wood Cliffs, New Jersey, 1972).

3. R.F. Leheny, A. A. Ballman, J. C. DeWinter, R. E. Nahory, and M. A.
Pollack, J. Elec. Matl. 9, 561 (1980).

4. P. D. Greene, S. A. Wheeler, A. R. Adams, A. N. El-Sabbahy, and C.
N. Ahmad, Appl. Phys. Lett. 35, 78 (1979).

§. H. Jung, E. Gébel, K. M. Romanek, and M. H. Pilkubn, Appl. Phys.
Lett. 39, 468 (1981).

6. A. Prabhakar, R. E. Nahory, and M. A. Pollack, unpublished data.

7. M.A. Pollack, R. E. Nahory, J. C. DeWinter, and A. A. Ballman, Appl.
Phys. Lett. 38, 314 (1978).

| 8. R. E. Nahory, M. A. Pollack, W. D. Johnston, Jr., and R. L. Barns,

Appl. Phys. Lett. 83, 659 (1978).

9. A. Haug, Elec. Lett. 20, 85 (1984).

10. N. K. Dutta and R. J. Nelson, J. Appl. Phys. 58, 74 (1982).

117

APPENDIX

EXPERIMENTAL DETAILS OF THE DLTS SYSTEM

118

Experimental Details of the DLTS System

Section 1.3.5 of this thesis explained the basic DLTS setup and listed
the equipment used for the system based on a commercial (Boonton Model
72BD) capacitance meter. The purpose of this Appendix is to provide the
details of the setup used for the high-frequency capacitance transient mea-
surements.

The one-megahertz Boonton meter takes approximately 1 — 2 ms to re-
cover from the overload that occurs during a DLTS trap-filling pulse. This
limitation presents a problem when the user wishes to make an activation
energy measurement, which requires the analysis of transients over a large
range of decay times. For these measurements, a system with a faster re-
sponse is necessary.

Figure A.l is a diagram of our fast-response capacitance bridge. This
circuit is a modified version of the original setup proposed by Lang.! The
radio-frequency signal is divided and applied to two branches of the circuit:
one contains the sample, and tho other is a reference branch. The sample
diode is reverse biased by the DC supply. It is in series with an attenuator
and in parallel with a phase shifter (PS) and variable attenuator. These
are adjusted so that the parallel legs are 180° out of phase and have equal
amplitude, resulting in minimal signal going into the first amplifier (pre-
amp). When the impedance of the sample changes, e.g., after a trap-filling
pulse, the amplitude of this signal increases. The output from the pre-amp is

mixed with the signal from the other branch, which has been attenuated to

119

Figure A.1: Diagram of apparatus for fast capacitance transient measure-

ments.

120

youBis . | vvoxog be Wald

3s1Nd

4"ro
ere

SL11q 318n0g SS¥q MO]
-3ud >—| H3XIW <4 NLL
Nily od
-UVA, = Sd
(4 1INdS
oo 3 voo!l ,
dito
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Leecceeeee } ve sro 44097
FNS = wy00)
4 du

121

the correct amplitude. Since we are only interested in the capacitive portion
of the impedance change, the phase shifter in the reference branch is adjusted
so that switching the 3 Q resistor next to the sample into the circuit does not
affect the mixer output. The mixer output is then amplified by a low-pass
amplifier. The signal from this amplifier is proportional to the capacitance
change of the sample (for the relatively small capacitance changes which are
typical for DLTS); thus, this signal is sent to the double boxcar amplifier for
transient analysis.

To operate this setup, the user begins by connecting the sample diode
and minimizing the signal out of the pre-amp by adjusting the two atten-
uators and the phase shifter in the sample loop. Then the output of the
low-pass amplifier is monitored while the 3 2 resistor is switched into the
circuit. The reference phase shifter is adjusted until the resistor has no ef-
fect on the signal. The system is typically operated at 20 MHz with the
magnitude of the RF signal applied to the sample at approximately 0.2 V.
It provides DLTS sensitivities similar to the Boonton system (occasionally
better) and recovery times under 100 pes, an order of magnitude improvement

over the commercial system.

122

REFERENCES

1. D.V. Lang, J. Appl. Phys. 45, 3014 (1974).